Skyrim: Enable SoC OCP Interrupt

Enable interrupt for SoC OCP, and shutdown with a log print if one
occurs.

LOW_COVERAGE_REASON=no unit test for skyrim board yet: b/247151116

BRANCH=None
BUG=b:237563166
TEST=on skyrim A4 and D4, verify system can boot with no unexpected
shutdown

Signed-off-by: Diana Z <dzigterman@chromium.org>
Change-Id: I822e31dfdc91fdde14ea428a4958a15dfd179d87
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3749802
Reviewed-by: Robert Zieba <robertzieba@google.com>
Code-Coverage: Zoss <zoss-cl-coverage@prod.google.com>

4 files changed, 40 insertions, 2 deletions

diff --git a/zephyr/projects/skyrim/gpio.dts b/zephyr/projects/skyrim/gpio.dts
index 4c935320b2..57abcc846d 100644
--- a/zephyr/projects/skyrim/gpio.dts
+++ b/zephyr/projects/skyrim/gpio.dts
@@ -151,8 +151,7 @@
 		gpio_ec_soc_pwr_good: ec_soc_pwr_good {
 			gpios = <&gpiod 3 GPIO_OUTPUT_LOW>;
 		};
-		/* TODO: Add interrupt handler to shut down */
-		pcore_ocp_r_l {
+		gpio_pcore_ocp_r_l: pcore_ocp_r_l {
 			gpios = <&gpioa 5 GPIO_INPUT>;
 		};
 		gpio_usb_hub_fault_q_odl: usb_hub_fault_q_odl {
diff --git a/zephyr/projects/skyrim/interrupts.dts b/zephyr/projects/skyrim/interrupts.dts
index 0749b72078..de4e87986a 100644
--- a/zephyr/projects/skyrim/interrupts.dts
+++ b/zephyr/projects/skyrim/interrupts.dts
@@ -62,6 +62,11 @@
 			flags = <GPIO_INT_EDGE_FALLING>;
 			handler = "baseboard_soc_thermtrip";
 		};
+		int_soc_pcore_ocp: soc_pcore_ocp {
+			irq-pin = <&gpio_pcore_ocp_r_l>;
+			flags = <GPIO_INT_EDGE_FALLING>;
+			handler = "baseboard_soc_pcore_ocp";
+		};
 		int_volume_up: volume_up {
 			irq-pin = <&gpio_volup_btn_odl>;
 			flags = <GPIO_INT_EDGE_BOTH>;
diff --git a/zephyr/projects/skyrim/src/power_signals.c b/zephyr/projects/skyrim/src/power_signals.c
index f21c18c5de..1f72d482b9 100644
--- a/zephyr/projects/skyrim/src/power_signals.c
+++ b/zephyr/projects/skyrim/src/power_signals.c
@@ -133,12 +133,21 @@ void baseboard_set_soc_pwr_pgood(enum gpio_signal unused)
 #define MP2854A_MFR_VOUT_CMPS_MAX_REG 0x69
 #define MP2854A_MFR_LOW_PWR_SEL BIT(12)
 
+__overridable bool board_supports_pcore_ocp(void)
+{
+	return true;
+}
+
 static void setup_mp2845(void)
 {
 	if (i2c_update16(chg_chips[CHARGER_SOLO].i2c_port,
 			 MP2845A_I2C_ADDR_FLAGS, MP2854A_MFR_VOUT_CMPS_MAX_REG,
 			 MP2854A_MFR_LOW_PWR_SEL, MASK_CLR))
 		ccprints("Failed to send mp2845 workaround");
+
+	if (board_supports_pcore_ocp())
+		gpio_enable_dt_interrupt(
+			GPIO_INT_FROM_NODELABEL(int_soc_pcore_ocp));
 }
 DECLARE_DEFERRED(setup_mp2845);
 
@@ -152,6 +161,9 @@ void baseboard_s0_pgood(enum gpio_signal signal)
 	/* Set up the MP2845, which is powered in S0 */
 	if (gpio_pin_get_dt(GPIO_DT_FROM_NODELABEL(gpio_s0_pgood)))
 		hook_call_deferred(&setup_mp2845_data, 50 * MSEC);
+	else
+		gpio_disable_dt_interrupt(
+			GPIO_INT_FROM_NODELABEL(int_soc_pcore_ocp));
 }
 
 /* Note: signal parameter unused */
@@ -222,3 +234,9 @@ void baseboard_soc_thermtrip(enum gpio_signal signal)
 	ccprints("SoC thermtrip reported, shutting down");
 	chipset_force_shutdown(CHIPSET_SHUTDOWN_THERMAL);
 }
+
+void baseboard_soc_pcore_ocp(enum gpio_signal signal)
+{
+	ccprints("SoC Pcore OCP reported, shutting down");
+	chipset_force_shutdown(CHIPSET_SHUTDOWN_BOARD_CUSTOM);
+}
diff --git a/zephyr/projects/skyrim/src/skyrim/fan.c b/zephyr/projects/skyrim/src/skyrim/fan.c
index 70d512bb78..0a368ee6f0 100644
--- a/zephyr/projects/skyrim/src/skyrim/fan.c
+++ b/zephyr/projects/skyrim/src/skyrim/fan.c
@@ -44,3 +44,19 @@ static void fan_init(void)
 	}
 }
 DECLARE_HOOK(HOOK_INIT, fan_init, HOOK_PRIO_POST_FIRST);
+
+/*
+ * Pcore OCP support
+ * Note: early boards should note enable this interrupt as they are not
+ * correctly configured for it.
+ */
+__override bool board_supports_pcore_ocp(void)
+{
+	uint32_t board_version;
+
+	if (cbi_get_board_version(&board_version) == EC_SUCCESS &&
+	    board_version > 3)
+		return true;
+
+	return false;
+}