diff options
author | Scott Collyer <scollyer@google.com> | 2018-12-06 11:46:50 -0800 |
---|---|---|
committer | chrome-bot <chrome-bot@chromium.org> | 2019-01-24 00:51:29 -0800 |
commit | ea9913e368cabf00666a691eecb0fa61badd9da2 (patch) | |
tree | 7842220d1d2d2d8b8e820b23e0daa21e07a064a7 | |
parent | d7579bd4589d08eeabf7c01f055b925acb7aed67 (diff) | |
download | chrome-ec-ea9913e368cabf00666a691eecb0fa61badd9da2.tar.gz |
hatch: Initial skeleton for hatch
This CL adds hatch in /board and /baseboard. Only some GPIO signals,
flash configuration, and I2C port map/pins required for NPCX to
successfully build have been included.
BRANCH=none
BUG=b:122251649
TEST=make buildall
Change-Id: Ief19223473f31b1f3a55e1466cc47d7cfeef8060
Signed-off-by: Scott Collyer <scollyer@google.com>
Reviewed-on: https://chromium-review.googlesource.com/1377569
Commit-Ready: Scott Collyer <scollyer@chromium.org>
Tested-by: Scott Collyer <scollyer@chromium.org>
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
-rw-r--r-- | baseboard/hatch/baseboard.c | 21 | ||||
-rw-r--r-- | baseboard/hatch/baseboard.h | 30 | ||||
-rw-r--r-- | baseboard/hatch/build.mk | 9 | ||||
-rw-r--r-- | board/hatch/board.c | 31 | ||||
-rw-r--r-- | board/hatch/board.h | 43 | ||||
-rw-r--r-- | board/hatch/build.mk | 14 | ||||
-rw-r--r-- | board/hatch/ec.tasklist | 28 | ||||
-rw-r--r-- | board/hatch/gpio.inc | 44 | ||||
-rwxr-xr-x | util/flash_ec | 1 |
9 files changed, 221 insertions, 0 deletions
diff --git a/baseboard/hatch/baseboard.c b/baseboard/hatch/baseboard.c new file mode 100644 index 0000000000..19de9d6cf5 --- /dev/null +++ b/baseboard/hatch/baseboard.c @@ -0,0 +1,21 @@ +/* Copyright 2019 The Chromium OS Authors. All rights reserved. + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +/* Hatch family-specific configuration */ + +#include "gpio.h" +#include "i2c.h" + +/******************************************************************************/ +/* I2C port map configuration */ +const struct i2c_port_t i2c_ports[] = { + {"sensor", I2C_PORT_SENSOR, 100, GPIO_I2C0_SCL, GPIO_I2C0_SDA}, + {"ppc0", I2C_PORT_PPC0, 100, GPIO_I2C1_SCL, GPIO_I2C1_SDA}, + {"tcpc1", I2C_PORT_TCPC1, 100, GPIO_I2C2_SCL, GPIO_I2C2_SDA}, + {"tcpc0", I2C_PORT_TCPC0, 100, GPIO_I2C3_SCL, GPIO_I2C3_SDA}, + {"power", I2C_PORT_POWER, 100, GPIO_I2C5_SCL, GPIO_I2C5_SDA}, + {"eeprom", I2C_PORT_EEPROM, 100, GPIO_I2C7_SCL, GPIO_I2C7_SDA}, +}; +const unsigned int i2c_ports_used = ARRAY_SIZE(i2c_ports); diff --git a/baseboard/hatch/baseboard.h b/baseboard/hatch/baseboard.h new file mode 100644 index 0000000000..9fa7b54f62 --- /dev/null +++ b/baseboard/hatch/baseboard.h @@ -0,0 +1,30 @@ +/* Copyright 2019 The Chromium OS Authors. All rights reserved. + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +/* Hatch baseboard configuration */ + +#ifndef __CROS_EC_BASEBOARD_H +#define __CROS_EC_BASEBOARD_H + +/* NPCX7 config */ +#define NPCX7_PWM1_SEL 0 /* GPIO C2 is not used as PWM1. */ +#define NPCX_UART_MODULE2 1 /* GPIO64/65 are used as UART pins. */ +/* Internal SPI flash on NPCX796FC is 512 kB */ +#define CONFIG_FLASH_SIZE (512 * 1024) +#define CONFIG_SPI_FLASH_REGS +#define CONFIG_SPI_FLASH_W25Q80 /* Internal SPI flash type. */ + +/* I2C Bus Configuration */ +#define CONFIG_I2C +#define CONFIG_I2C_MASTER +#define I2C_PORT_SENSOR NPCX_I2C_PORT0_0 +#define I2C_PORT_PPC0 NPCX_I2C_PORT1_0 +#define I2C_PORT_TCPC1 NPCX_I2C_PORT2_0 +#define I2C_PORT_TCPC0 NPCX_I2C_PORT3_0 +#define I2C_PORT_POWER NPCX_I2C_PORT5_0 +#define I2C_PORT_EEPROM NPCX_I2C_PORT7_0 +#define I2C_ADDR_EEPROM 0xA0 + +#endif /* __CROS_EC_BASEBOARD_H */ diff --git a/baseboard/hatch/build.mk b/baseboard/hatch/build.mk new file mode 100644 index 0000000000..f7abf9f78c --- /dev/null +++ b/baseboard/hatch/build.mk @@ -0,0 +1,9 @@ +# -*- makefile -*- +# Copyright 2019 The Chromium OS Authors. All rights reserved. +# Use of this source code is governed by a BSD-style license that can be +# found in the LICENSE file. +# +# Hatch baseboard specific files build +# + +baseboard-y=baseboard.o diff --git a/board/hatch/board.c b/board/hatch/board.c new file mode 100644 index 0000000000..d1e6424067 --- /dev/null +++ b/board/hatch/board.c @@ -0,0 +1,31 @@ +/* Copyright 2019 The Chromium OS Authors. All rights reserved. + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +/* Hatch board-specific configuration */ + +#include "common.h" +#include "extpower.h" +#include "gpio.h" +#include "lid_switch.h" +#include "power_button.h" +#include "spi.h" +#include "switch.h" +#include "system.h" +#include "uart.h" +#include "util.h" + +#include "gpio_list.h" /* Must come after other header files. */ + +/******************************************************************************/ +/* Wake up pins */ +const enum gpio_signal hibernate_wake_pins[] = { +}; +const int hibernate_wake_pins_used = ARRAY_SIZE(hibernate_wake_pins); + +/******************************************************************************/ +/* SPI devices */ +const struct spi_device_t spi_devices[] = { +}; +const unsigned int spi_devices_used = ARRAY_SIZE(spi_devices); diff --git a/board/hatch/board.h b/board/hatch/board.h new file mode 100644 index 0000000000..c30afa0c3a --- /dev/null +++ b/board/hatch/board.h @@ -0,0 +1,43 @@ +/* Copyright 2019 The Chromium OS Authors. All rights reserved. + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +/* Hatch board configuration */ + +#ifndef __CROS_EC_BOARD_H +#define __CROS_EC_BOARD_H + +/* Baseboard features */ +#include "baseboard.h" + +/* Optional features */ +#define CONFIG_SYSTEM_UNLOCKED /* Allow dangerous commands while in dev. */ + +#define CONFIG_POWER_BUTTON +#define CONFIG_KEYBOARD_BOARD_CONFIG +#define CONFIG_KEYBOARD_PROTOCOL_8042 +#define CONFIG_LOW_POWER_IDLE + +#define CONFIG_HOSTCMD_ESPI +#define CONFIG_HOSTCMD_ESPI_VW_SIGNALS + +#undef CONFIG_UART_TX_BUF_SIZE +#define CONFIG_UART_TX_BUF_SIZE 4096 + +#ifndef __ASSEMBLER__ + +#include "gpio_signal.h" +#include "registers.h" + +enum adc_channel { + ADC_CH_COUNT +}; + +enum pwm_channel { + PWM_CH_COUNT +}; + +#endif /* !__ASSEMBLER__ */ + +#endif /* __CROS_EC_BOARD_H */ diff --git a/board/hatch/build.mk b/board/hatch/build.mk new file mode 100644 index 0000000000..cd9ac52863 --- /dev/null +++ b/board/hatch/build.mk @@ -0,0 +1,14 @@ +# -*- makefile -*- +# Copyright 2019 The Chromium OS Authors. All rights reserved. +# Use of this source code is governed by a BSD-style license that can be +# found in the LICENSE file. +# +# Board specific files build +# + +CHIP:=npcx +CHIP_FAMILY:=npcx7 +CHIP_VARIANT:=npcx7m6fc +BASEBOARD:=hatch + +board-y=board.o diff --git a/board/hatch/ec.tasklist b/board/hatch/ec.tasklist new file mode 100644 index 0000000000..f3453d6398 --- /dev/null +++ b/board/hatch/ec.tasklist @@ -0,0 +1,28 @@ +/* Copyright 2019 The Chromium OS Authors. All rights reserved. + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +/* + * List of enabled tasks in the priority order + * + * The first one has the lowest priority. + * + * For each task, use the macro TASK_ALWAYS(n, r, d, s) for base tasks and + * TASK_NOTEST(n, r, d, s) for tasks that can be excluded in test binaries, + * where : + * 'n' in the name of the task + * 'r' in the main routine of the task + * 'd' in an opaque parameter passed to the routine at startup + * 's' is the stack size in bytes; must be a multiple of 8 + * + * For USB PD tasks, IDs must be in consecutive order and correspond to + * the port which they are for. See TASK_ID_TO_PD_PORT() macro. + */ + +#define CONFIG_TASK_LIST \ + TASK_ALWAYS(HOOKS, hook_task, NULL, LARGER_TASK_STACK_SIZE) \ + TASK_NOTEST(KEYPROTO, keyboard_protocol_task, NULL, TASK_STACK_SIZE) \ + TASK_ALWAYS(HOSTCMD, host_command_task, NULL, LARGER_TASK_STACK_SIZE) \ + TASK_ALWAYS(CONSOLE, console_task, NULL, VENTI_TASK_STACK_SIZE) \ + diff --git a/board/hatch/gpio.inc b/board/hatch/gpio.inc new file mode 100644 index 0000000000..4f4f70fc5b --- /dev/null +++ b/board/hatch/gpio.inc @@ -0,0 +1,44 @@ +/* -*- mode:c -*- + * + * Copyright 2019 The Chromium OS Authors. All rights reserved. + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +/* Declare symbolic names for all the GPIOs that we care about. + * Note: Those with interrupt handlers must be declared first. */ + +/* Wake Source interrupts */ +GPIO_INT(LID_OPEN, PIN(D, 2), GPIO_INT_BOTH, lid_interrupt) +GPIO_INT(WP_L, PIN(A, 1), GPIO_INT_BOTH, switch_interrupt) /* EC_WP_ODL */ +GPIO_INT(POWER_BUTTON_L, PIN(0, 1), GPIO_INT_BOTH, power_button_interrupt) /* MECH_PWR_BTN_ODL */ + + +GPIO(SYS_RESET_L, PIN(0, 2), GPIO_ODR_HIGH) /* SYS_RST_ODL */ +GPIO(ENTERING_RW, PIN(E, 3), GPIO_OUT_LOW) /* EC_ENTERING_RW */ +GPIO(PCH_WAKE_L, PIN(7, 4), GPIO_ODR_HIGH) /* EC_PCH_WAKE_ODL */ +GPIO(PCH_PWRBTN_L, PIN(C, 1), GPIO_ODR_HIGH) /* EC_PCH_PWR_BTN_ODL */ + +/* I2C pins - Alternate function below configures I2C module on these pins */ +GPIO(I2C0_SCL, PIN(B, 5), GPIO_INPUT | + GPIO_SEL_1P8V) /* EC_I2C_SENSOR_1V8_SCL */ +GPIO(I2C0_SDA, PIN(B, 4), GPIO_INPUT | + GPIO_SEL_1P8V) /* EC_I2C_SENSOR_1V8_SDA */ +GPIO(I2C1_SCL, PIN(9, 0), GPIO_INPUT) /* EC_I2C_USB_C0_PD_SCL */ +GPIO(I2C1_SDA, PIN(8, 7), GPIO_INPUT) /* EC_I2C_USB_C0_PD_SDA */ +GPIO(I2C2_SCL, PIN(9, 2), GPIO_INPUT) /* EC_I2C_USB_C1_PD_SCL */ +GPIO(I2C2_SDA, PIN(9, 1), GPIO_INPUT) /* EC_I2C_USB_C1_PD_SDA */ +GPIO(I2C3_SCL, PIN(D, 1), GPIO_INPUT) /* EC_I2C_USB_C0_TCPC_SDA */ +GPIO(I2C3_SDA, PIN(D, 0), GPIO_INPUT) /* EC_I2C_USB_C0_TCPC_SCL */ +GPIO(I2C5_SCL, PIN(3, 3), GPIO_INPUT) /* EC_I2C_POWER_SCL */ +GPIO(I2C5_SDA, PIN(3, 6), GPIO_INPUT) /* EC_I2C_POWER_SDA */ +GPIO(I2C7_SCL, PIN(B, 3), GPIO_INPUT) /* EC_I2C_EEPROM_SCL */ +GPIO(I2C7_SDA, PIN(B, 2), GPIO_INPUT) /* EC_I2C_EEPROM_SDA */ + +/* Alternate functions GPIO definitions */ +ALTERNATE(PIN_MASK(B, 0x30), 0, MODULE_I2C, (GPIO_INPUT | GPIO_SEL_1P8V)) /* I2C0 1.8V */ +ALTERNATE(PIN_MASK(9, 0x07), 0, MODULE_I2C, 0) /* I2C1 SCL / I2C2 */ +ALTERNATE(PIN_MASK(8, 0x80), 0, MODULE_I2C, 0) /* I2C1 SDA */ +ALTERNATE(PIN_MASK(D, 0x03), 0, MODULE_I2C, 0) /* I2C3 */ +ALTERNATE(PIN_MASK(3, 0x48), 0, MODULE_I2C, 0) /* I2C5 */ +ALTERNATE(PIN_MASK(B, 0x0C), 0, MODULE_I2C, 0) /* I2C7 */ diff --git a/util/flash_ec b/util/flash_ec index 253c106b91..19e501e713 100755 --- a/util/flash_ec +++ b/util/flash_ec @@ -153,6 +153,7 @@ BOARDS_NPCX_UUT=( cheza fleex grunt + hatch meep phaser yorp |