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authorFabio Baltieri <fabiobaltieri@google.com>2022-12-20 16:11:47 +0000
committerChromeos LUCI <chromeos-scoped@luci-project-accounts.iam.gserviceaccount.com>2022-12-21 10:37:44 +0000
commite1acb8639fd80f0ff6fb46828a3a9a01a55c1c7e (patch)
treee35e972d3c4a043bfc4233a95419f845d7a19632
parentbd28cd0b8c1b7d31c637aa88e02108c38fedcbeb (diff)
downloadchrome-ec-e1acb8639fd80f0ff6fb46828a3a9a01a55c1c7e.tar.gz
zephyr: bbram: unify bbram access macros
Unify the various bbram check/size/offset macro implementation into a common set of macros, getting rid of DT_PATH usages in the process. BRANCH=none BUG=none TEST=cq dry run TEST=zmake compare-builds -a Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com> Change-Id: Ib698a6c7236d327b761190aeac9d55daa9032a89 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/4114285 Code-Coverage: Zoss <zoss-cl-coverage@prod.google.com> Reviewed-by: Jeremy Bettis <jbettis@chromium.org>
-rw-r--r--zephyr/drivers/cros_system/cros_system_npcx.c3
-rw-r--r--zephyr/drivers/cros_system/cros_system_xec.c3
-rw-r--r--zephyr/shim/chip/mchp/system.c8
-rw-r--r--zephyr/shim/chip/mchp/system_external_storage.c13
-rw-r--r--zephyr/shim/include/bbram.h33
-rw-r--r--zephyr/shim/src/system.c50
-rw-r--r--zephyr/test/system_shim/src/test_system.c14
7 files changed, 72 insertions, 52 deletions
diff --git a/zephyr/drivers/cros_system/cros_system_npcx.c b/zephyr/drivers/cros_system/cros_system_npcx.c
index 4fc1f1f977..01e7f1efe6 100644
--- a/zephyr/drivers/cros_system/cros_system_npcx.c
+++ b/zephyr/drivers/cros_system/cros_system_npcx.c
@@ -3,6 +3,7 @@
* found in the LICENSE file.
*/
+#include "bbram.h"
#include "drivers/cros_system.h"
#include "gpio/gpio_int.h"
#include "rom_chip.h"
@@ -85,7 +86,7 @@ struct cros_system_npcx_data {
/* Get saved reset flag address in battery-backed ram */
#define BBRAM_SAVED_RESET_FLAG_ADDR \
(DT_REG_ADDR(DT_INST(0, nuvoton_npcx_bbram)) + \
- DT_PROP(DT_PATH(named_bbram_regions, saved_reset_flags), offset))
+ BBRAM_REGION_OFFSET(saved_reset_flags))
/* Soc specific system local functions */
static int system_npcx_watchdog_stop(void)
diff --git a/zephyr/drivers/cros_system/cros_system_xec.c b/zephyr/drivers/cros_system/cros_system_xec.c
index f91b4630fc..7cbf0330e8 100644
--- a/zephyr/drivers/cros_system/cros_system_xec.c
+++ b/zephyr/drivers/cros_system/cros_system_xec.c
@@ -3,6 +3,7 @@
* found in the LICENSE file.
*/
+#include "bbram.h"
#include "gpio/gpio_int.h"
#include "system.h"
#include "system_chip.h"
@@ -74,7 +75,7 @@ struct cros_system_xec_data {
/* Get saved reset flag address in battery-backed ram */
#define BBRAM_SAVED_RESET_FLAG_ADDR \
(DT_REG_ADDR(DT_INST(0, microchip_xec_bbram)) + \
- DT_PROP(DT_PATH(named_bbram_regions, saved_reset_flags), offset))
+ BBRAM_REGION_OFFSET(offset)
/* Soc specific system local functions */
static int system_xec_watchdog_stop(void)
diff --git a/zephyr/shim/chip/mchp/system.c b/zephyr/shim/chip/mchp/system.c
index 6e5da9aa80..517c928ad1 100644
--- a/zephyr/shim/chip/mchp/system.c
+++ b/zephyr/shim/chip/mchp/system.c
@@ -3,6 +3,7 @@
* found in the LICENSE file.
*/
+#include "bbram.h"
#include "system.h"
#include "system_chip.h"
@@ -11,9 +12,6 @@
LOG_MODULE_REGISTER(shim_xec_system, LOG_LEVEL_ERR);
-#define GET_BBRAM_OFS(node) DT_PROP(DT_PATH(named_bbram_regions, node), offset)
-#define GET_BBRAM_SZ(node) DT_PROP(DT_PATH(named_bbram_regions, node), size)
-
/*
* Reset image type back to RO in BBRAM as watchdog resets.
* Watchdog reset will reset EC chip, ROM loader loads RO
@@ -29,8 +27,8 @@ void cros_chip_wdt_handler(const struct device *wdt_dev, int channel_id)
return;
}
- bbram_write(bbram_dev, GET_BBRAM_OFS(ec_img_load),
- GET_BBRAM_SZ(ec_img_load), (uint8_t *)&value);
+ bbram_write(bbram_dev, BBRAM_REGION_OFFSET(ec_img_load),
+ BBRAM_REGION_SIZE(ec_img_load), (uint8_t *)&value);
}
static void chip_bbram_status_check(void)
diff --git a/zephyr/shim/chip/mchp/system_external_storage.c b/zephyr/shim/chip/mchp/system_external_storage.c
index 5887e045a4..b21a9aeb5d 100644
--- a/zephyr/shim/chip/mchp/system_external_storage.c
+++ b/zephyr/shim/chip/mchp/system_external_storage.c
@@ -3,6 +3,7 @@
* found in the LICENSE file.
*/
+#include "bbram.h"
#include "clock_chip.h"
#include "common.h"
#include "config_chip.h"
@@ -18,9 +19,6 @@
#define MCHP_ECRW_WORD 0x57524345u /* ASCII ECRW */
#define MCHP_PCR_NODE DT_INST(0, microchip_xec_pcr)
-#define GET_BBRAM_OFS(node) DT_PROP(DT_PATH(named_bbram_regions, node), offset)
-#define GET_BBRAM_SZ(node) DT_PROP(DT_PATH(named_bbram_regions, node), size)
-
static const struct device *const bbram_dev =
COND_CODE_1(DT_HAS_CHOSEN(cros_ec_bbram),
DEVICE_DT_GET(DT_CHOSEN(cros_ec_bbram)), NULL);
@@ -87,8 +85,9 @@ enum ec_image system_get_shrspi_image_copy(void)
uint32_t value = 0u;
if (bbram_dev) {
- if (!bbram_read(bbram_dev, GET_BBRAM_OFS(ec_img_load),
- GET_BBRAM_SZ(ec_img_load), (uint8_t *)&value)) {
+ if (!bbram_read(bbram_dev, BBRAM_REGION_OFFSET(ec_img_load),
+ BBRAM_REGION_SIZE(ec_img_load),
+ (uint8_t *)&value)) {
img = (enum ec_image)(value & 0x7fu);
}
}
@@ -128,6 +127,6 @@ void system_set_image_copy(enum ec_image copy)
break;
}
- bbram_write(bbram_dev, GET_BBRAM_OFS(ec_img_load),
- GET_BBRAM_SZ(ec_img_load), (uint8_t *)&value);
+ bbram_write(bbram_dev, BBRAM_REGION_OFFSET(ec_img_load),
+ BBRAM_REGION_SIZE(ec_img_load), (uint8_t *)&value);
}
diff --git a/zephyr/shim/include/bbram.h b/zephyr/shim/include/bbram.h
new file mode 100644
index 0000000000..4b33c5f281
--- /dev/null
+++ b/zephyr/shim/include/bbram.h
@@ -0,0 +1,33 @@
+/* Copyright 2022 Google LLC
+ * Use of this source code is governed by a BSD-style license that can be
+ * found in the LICENSE file.
+ */
+
+#ifndef __CROS_EC_BBRAM_H
+#define __CROS_EC_BBRAM_H
+
+#include <zephyr/devicetree.h>
+#include <zephyr/toolchain.h>
+
+BUILD_ASSERT(DT_NUM_INST_STATUS_OKAY(named_bbram_regions) == 1,
+ "only one named-bbram-regions compatible node may be present");
+
+#define BBRAM_NODE DT_COMPAT_GET_ANY_STATUS_OKAY(named_bbram_regions)
+
+/*
+ * Check if a specific region has been defined under the named-bbram-region
+ * node.
+ */
+#define BBRAM_HAS_REGION(name) (DT_NODE_EXISTS(DT_CHILD(BBRAM_NODE, name)))
+
+/*
+ * Get the size of a specific region.
+ */
+#define BBRAM_REGION_SIZE(name) (DT_PROP(DT_CHILD(BBRAM_NODE, name), size))
+
+/*
+ * Get the offset of a specific region.
+ */
+#define BBRAM_REGION_OFFSET(name) (DT_PROP(DT_CHILD(BBRAM_NODE, name), offset))
+
+#endif /* __CROS_EC_BBRAM_H */
diff --git a/zephyr/shim/src/system.c b/zephyr/shim/src/system.c
index 0b47782b42..387cedf9ab 100644
--- a/zephyr/shim/src/system.c
+++ b/zephyr/shim/src/system.c
@@ -3,6 +3,7 @@
* found in the LICENSE file.
*/
+#include "bbram.h"
#include "common.h"
#include "console.h"
#include "cros_version.h"
@@ -15,15 +16,6 @@
#include <drivers/cros_system.h>
-#define BBRAM_REGION_PD0 DT_PATH(named_bbram_regions, pd0)
-#define BBRAM_REGION_PD1 DT_PATH(named_bbram_regions, pd1)
-#define BBRAM_REGION_PD2 DT_PATH(named_bbram_regions, pd2)
-#define BBRAM_REGION_TRY_SLOT DT_PATH(named_bbram_regions, try_slot)
-
-#define GET_BBRAM_OFFSET(node) \
- DT_PROP(DT_PATH(named_bbram_regions, node), offset)
-#define GET_BBRAM_SIZE(node) DT_PROP(DT_PATH(named_bbram_regions, node), size)
-
/* 2 second delay for waiting the H1 reset */
#define WAIT_RESET_TIME \
(CONFIG_PLATFORM_EC_PREINIT_HW_CYCLES_PER_SEC * 2 / \
@@ -41,28 +33,28 @@ static int bbram_lookup(enum system_bbram_idx idx, int *offset_out,
int *size_out)
{
switch (idx) {
-#if DT_NODE_EXISTS(BBRAM_REGION_PD0)
+#if BBRAM_HAS_REGION(pd0)
case SYSTEM_BBRAM_IDX_PD0:
- *offset_out = DT_PROP(BBRAM_REGION_PD0, offset);
- *size_out = DT_PROP(BBRAM_REGION_PD0, size);
+ *offset_out = BBRAM_REGION_OFFSET(pd0);
+ *size_out = BBRAM_REGION_SIZE(pd0);
break;
#endif
-#if DT_NODE_EXISTS(BBRAM_REGION_PD1)
+#if BBRAM_HAS_REGION(pd1)
case SYSTEM_BBRAM_IDX_PD1:
- *offset_out = DT_PROP(BBRAM_REGION_PD1, offset);
- *size_out = DT_PROP(BBRAM_REGION_PD1, size);
+ *offset_out = BBRAM_REGION_OFFSET(pd1);
+ *size_out = BBRAM_REGION_SIZE(pd1);
break;
#endif
-#if DT_NODE_EXISTS(BBRAM_REGION_PD2)
+#if BBRAM_HAS_REGION(pd2)
case SYSTEM_BBRAM_IDX_PD2:
- *offset_out = DT_PROP(BBRAM_REGION_PD2, offset);
- *size_out = DT_PROP(BBRAM_REGION_PD2, size);
+ *offset_out = BBRAM_REGION_OFFSET(pd2);
+ *size_out = BBRAM_REGION_SIZE(pd2);
break;
#endif
-#if DT_NODE_EXISTS(BBRAM_REGION_TRY_SLOT)
+#if BBRAM_HAS_REGION(try_slot)
case SYSTEM_BBRAM_IDX_TRY_SLOT:
- *offset_out = DT_PROP(BBRAM_REGION_TRY_SLOT, offset);
- *size_out = DT_PROP(BBRAM_REGION_TRY_SLOT, size);
+ *offset_out = BBRAM_REGION_OFFSET(try_slot);
+ *size_out = BBRAM_REGION_SIZE(try_slot);
break;
#endif
default:
@@ -94,8 +86,8 @@ void chip_save_reset_flags(uint32_t flags)
return;
}
- bbram_write(bbram_dev, GET_BBRAM_OFFSET(saved_reset_flags),
- GET_BBRAM_SIZE(saved_reset_flags), (uint8_t *)&flags);
+ bbram_write(bbram_dev, BBRAM_REGION_OFFSET(saved_reset_flags),
+ BBRAM_REGION_SIZE(saved_reset_flags), (uint8_t *)&flags);
}
uint32_t chip_read_reset_flags(void)
@@ -107,8 +99,8 @@ uint32_t chip_read_reset_flags(void)
return 0;
}
- bbram_read(bbram_dev, GET_BBRAM_OFFSET(saved_reset_flags),
- GET_BBRAM_SIZE(saved_reset_flags), (uint8_t *)&flags);
+ bbram_read(bbram_dev, BBRAM_REGION_OFFSET(saved_reset_flags),
+ BBRAM_REGION_SIZE(saved_reset_flags), (uint8_t *)&flags);
return flags;
}
@@ -120,8 +112,8 @@ int system_set_scratchpad(uint32_t value)
return -EC_ERROR_INVAL;
}
- return bbram_write(bbram_dev, GET_BBRAM_OFFSET(scratchpad),
- GET_BBRAM_SIZE(scratchpad), (uint8_t *)&value);
+ return bbram_write(bbram_dev, BBRAM_REGION_OFFSET(scratchpad),
+ BBRAM_REGION_SIZE(scratchpad), (uint8_t *)&value);
}
int system_get_scratchpad(uint32_t *value)
@@ -131,8 +123,8 @@ int system_get_scratchpad(uint32_t *value)
return -EC_ERROR_INVAL;
}
- if (bbram_read(bbram_dev, GET_BBRAM_OFFSET(scratchpad),
- GET_BBRAM_SIZE(scratchpad), (uint8_t *)value)) {
+ if (bbram_read(bbram_dev, BBRAM_REGION_OFFSET(scratchpad),
+ BBRAM_REGION_SIZE(scratchpad), (uint8_t *)value)) {
return -EC_ERROR_INVAL;
}
diff --git a/zephyr/test/system_shim/src/test_system.c b/zephyr/test/system_shim/src/test_system.c
index 56031a4b67..cd58fcf604 100644
--- a/zephyr/test/system_shim/src/test_system.c
+++ b/zephyr/test/system_shim/src/test_system.c
@@ -3,6 +3,7 @@
* found in the LICENSE file.
*/
+#include "bbram.h"
#include "drivers/cros_system.h"
#include "fakes.h"
#include "system.h"
@@ -19,11 +20,6 @@
LOG_MODULE_REGISTER(test);
-#define BBRAM_REGION_OFF(name) \
- DT_PROP(DT_PATH(named_bbram_regions, name), offset)
-#define BBRAM_REGION_SIZE(name) \
- DT_PROP(DT_PATH(named_bbram_regions, name), size)
-
static char mock_data[64] =
"abcdefghijklmnopqrstuvwxyzABCDEFGHIJKLMNOPQRSTUVWXYZ0123456789!@";
@@ -48,22 +44,22 @@ ZTEST(system, test_bbram_get)
rc = system_get_bbram(SYSTEM_BBRAM_IDX_PD0, output);
zassert_ok(rc);
- zassert_mem_equal(output, mock_data + BBRAM_REGION_OFF(pd0),
+ zassert_mem_equal(output, mock_data + BBRAM_REGION_OFFSET(pd0),
BBRAM_REGION_SIZE(pd0), NULL);
rc = system_get_bbram(SYSTEM_BBRAM_IDX_PD1, output);
zassert_ok(rc);
- zassert_mem_equal(output, mock_data + BBRAM_REGION_OFF(pd1),
+ zassert_mem_equal(output, mock_data + BBRAM_REGION_OFFSET(pd1),
BBRAM_REGION_SIZE(pd1), NULL);
rc = system_get_bbram(SYSTEM_BBRAM_IDX_PD2, output);
zassert_ok(rc);
- zassert_mem_equal(output, mock_data + BBRAM_REGION_OFF(pd2),
+ zassert_mem_equal(output, mock_data + BBRAM_REGION_OFFSET(pd2),
BBRAM_REGION_SIZE(pd2), NULL);
rc = system_get_bbram(SYSTEM_BBRAM_IDX_TRY_SLOT, output);
zassert_ok(rc);
- zassert_mem_equal(output, mock_data + BBRAM_REGION_OFF(try_slot),
+ zassert_mem_equal(output, mock_data + BBRAM_REGION_OFFSET(try_slot),
BBRAM_REGION_SIZE(try_slot), NULL);
}