introducing chip variant for stm32 family [2/3]

Add a parameter to define the chip variant and pass it to build/make
processes.

Signed-off-by: Vincent Palatin <vpalatin@chromium.org>

BUG=chrome-os-partner:9057
TEST=make BOARD=daisy ; make BOARD=adv ; make BOARD=discovery

Change-Id: I87b65b582ed5fc2cf5966446e15224ac15e328e9

7 files changed, 46 insertions, 26 deletions

diff --git a/Makefile b/Makefile
index aebde142c7..998009a3cd 100644
--- a/Makefile
+++ b/Makefile
@@ -22,9 +22,9 @@ includes=include core/$(CORE)/include $(dirs) $(out)
 _tsk_lst:=$(shell echo "CONFIG_TASK_LIST" | $(CPP) -P -Iboard/$(BOARD) -Itest \
 	  -D"TASK(n, r, d)=n" -imacros $(PROJECT).tasklist)
 _tsk_cfg:=$(foreach t,$(_tsk_lst),CONFIG_TASK_$(t))
-_flag_cfg:=$(shell $(CPP) $(CFLAGS_INCLUDE) -P -dN chip/$(CHIP)/config.h | \
+_flag_cfg:=$(shell $(CPP) $(CPPFLAGS) -P -dN chip/$(CHIP)/config.h | \
 		grep -o "CONFIG_.*") \
-	   $(shell $(CPP) $(CFLAGS_INCLUDE) -P -dN board/$(BOARD)/board.h | \
+	   $(shell $(CPP) $(CPPFLAGS) -P -dN board/$(BOARD)/board.h | \
 		grep -o "CONFIG_.*")
 $(foreach c,$(_tsk_cfg) $(_flag_cfg),$(eval $(c)=y))
 CPPFLAGS+=$(foreach t,$(_tsk_cfg),-D$(t))
diff --git a/Makefile.toolchain b/Makefile.toolchain
index 4aae435863..1b55247ff5 100644
--- a/Makefile.toolchain
+++ b/Makefile.toolchain
@@ -1,4 +1,4 @@
-# Copyright (c) 2011 The Chromium OS Authors. All rights reserved.
+# Copyright (c) 2012 The Chromium OS Authors. All rights reserved.
 # Use of this source code is governed by a BSD-style license that can be
 # found in the LICENSE file.
 #
@@ -25,7 +25,8 @@ CFLAGS_WARN=-Wall -Werror -Wundef -Wstrict-prototypes -Wno-trigraphs      \
 CFLAGS_DEBUG= -g
 CFLAGS_INCLUDE=$(foreach i,$(includes),-I$(i) )
 CFLAGS_DEFINE=-DOUTDIR=$(out) -DCHIP=$(CHIP) -DTASKFILE=$(PROJECT).tasklist \
-              -DBOARD=$(BOARD) -DBOARD_$(BOARD) -DCORE=$(CORE) -DCHIP_$(CHIP)
+              -DBOARD=$(BOARD) -DBOARD_$(BOARD) -DCORE=$(CORE) -DCHIP_$(CHIP) \
+              -DCHIP_VARIANT=$(CHIP_VARIANT) -DCHIP_VARIANT_$(CHIP_VARIANT)
 CPPFLAGS=$(CFLAGS_DEFINE) $(CFLAGS_INCLUDE)
 CFLAGS=$(CPPFLAGS) $(CFLAGS_CPU) $(CFLAGS_DEBUG) $(CFLAGS_WARN)
 BUILD_CFLAGS=$(CPPFLAGS) -O3 $(CFLAGS_DEBUG) $(CFLAGS_WARN)
diff --git a/board/adv/build.mk b/board/adv/build.mk
index 9a395beb71..b09b1c7f4b 100644
--- a/board/adv/build.mk
+++ b/board/adv/build.mk
@@ -6,5 +6,6 @@
 
 # the IC is STmicro STM32L151R8H6
 CHIP:=stm32
+CHIP_VARIANT:=stm32l15x
 
 board-y=board.o
diff --git a/board/daisy/build.mk b/board/daisy/build.mk
index 9a395beb71..b09b1c7f4b 100644
--- a/board/daisy/build.mk
+++ b/board/daisy/build.mk
@@ -6,5 +6,6 @@
 
 # the IC is STmicro STM32L151R8H6
 CHIP:=stm32
+CHIP_VARIANT:=stm32l15x
 
 board-y=board.o
diff --git a/board/discovery/build.mk b/board/discovery/build.mk
index 9a395beb71..b09b1c7f4b 100644
--- a/board/discovery/build.mk
+++ b/board/discovery/build.mk
@@ -6,5 +6,6 @@
 
 # the IC is STmicro STM32L151R8H6
 CHIP:=stm32
+CHIP_VARIANT:=stm32l15x
 
 board-y=board.o
diff --git a/chip/stm32/config-stm32l15x.h b/chip/stm32/config-stm32l15x.h
new file mode 100644
index 0000000000..eafe078f1e
--- /dev/null
+++ b/chip/stm32/config-stm32l15x.h
@@ -0,0 +1,30 @@
+/* Copyright (c) 2012 The Chromium OS Authors. All rights reserved.
+ * Use of this source code is governed by a BSD-style license that can be
+ * found in the LICENSE file.
+ */
+
+/* Memory mapping */
+#define CONFIG_FLASH_BASE       0x08000000
+#define CONFIG_FLASH_SIZE       0x00020000
+#define CONFIG_FLASH_BANK_SIZE  0x1000
+#define CONFIG_RAM_BASE         0x20000000
+#define CONFIG_RAM_SIZE         0x00004000
+
+/* Size of one firmware image in flash */
+#define CONFIG_FW_IMAGE_SIZE    (32 * 1024)
+#define CONFIG_FW_RO_OFF        0
+#define CONFIG_FW_A_OFF         CONFIG_FW_IMAGE_SIZE
+#define CONFIG_FW_B_OFF         (2 * CONFIG_FW_IMAGE_SIZE)
+
+/* Number of IRQ vectors on the NVIC */
+#define CONFIG_IRQ_COUNT 45
+
+/* Debug UART parameters for panic message */
+#ifdef BOARD_adv
+#define CONFIG_UART_ADDRESS    0x40004400 /* USART2 */
+#else
+#define CONFIG_UART_ADDRESS    0x40013800 /* USART1 */
+#endif
+#define CONFIG_UART_DR_OFFSET  0x04
+#define CONFIG_UART_SR_OFFSET  0x00
+#define CONFIG_UART_SR_TXEMPTY 0x80
diff --git a/chip/stm32/config.h b/chip/stm32/config.h
index ef4dd75b27..567c03ee0a 100644
--- a/chip/stm32/config.h
+++ b/chip/stm32/config.h
@@ -3,31 +3,15 @@
  * found in the LICENSE file.
  */
 
-/* Memory mapping */
-#define CONFIG_FLASH_BASE       0x08000000
-#define CONFIG_FLASH_SIZE       0x00020000
-#define CONFIG_FLASH_BANK_SIZE  0x1000
-#define CONFIG_RAM_BASE         0x20000000
-#define CONFIG_RAM_SIZE         0x00004000
+#ifndef __CROS_EC_CHIP_CONFIG_H
+#define __CROS_EC_CHIP_CONFIG_H
 
-/* Size of one firmware image in flash */
-#define CONFIG_FW_IMAGE_SIZE    (32 * 1024)
-#define CONFIG_FW_RO_OFF        0
-#define CONFIG_FW_A_OFF         CONFIG_FW_IMAGE_SIZE
-#define CONFIG_FW_B_OFF         (2 * CONFIG_FW_IMAGE_SIZE)
-
-/* Number of IRQ vectors on the NVIC */
-#define CONFIG_IRQ_COUNT 45
-
-/* Debug UART parameters for panic message */
-#ifdef BOARD_adv
-#define CONFIG_UART_ADDRESS    0x40004400 /* USART2 */
+/* use variant specific configuration for flash / UART / IRQ */
+#ifdef CHIP_VARIANT_stm32l15x
+#include "config-stm32l15x.h"
 #else
-#define CONFIG_UART_ADDRESS    0x40013800 /* USART1 */
+#error "Unsupported chip variant"
 #endif
-#define CONFIG_UART_DR_OFFSET  0x04
-#define CONFIG_UART_SR_OFFSET  0x00
-#define CONFIG_UART_SR_TXEMPTY 0x80
 
 /* System stack size */
 #define CONFIG_STACK_SIZE 1024
@@ -37,3 +21,5 @@
 
 /* Compile for running from RAM instead of flash */
 /* #define COMPILE_FOR_RAM */
+
+#endif /* __CROS_EC_CHIP_CONFIG_H */