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authorJes B. Klinke <jbk@chromium.org>2023-02-17 11:22:32 -0800
committerChromeos LUCI <chromeos-scoped@luci-project-accounts.iam.gserviceaccount.com>2023-02-17 23:35:02 +0000
commit547db3e2f3242f352f6ac49bc5369d67ca82bc57 (patch)
treea43ed602cde58bb0967302456ae999ca2ffb5a6d
parent0b89053de723754d6c329794c3b596ffd905e9ab (diff)
downloadchrome-ec-547db3e2f3242f352f6ac49bc5369d67ca82bc57.tar.gz
chip/stm32: Extend ADC support to L5xx family
The L5 family has basically the same ADC component as L4. L5 does not have ADC3, but that happened to not be used by the stm32l4.c, so the existing implementation can be used without modification. BUG=b:269621551 TEST=Observe ADC conversions on HyperDebug Change-Id: I4ce279dca3ff23ae2a9d2f00c23399732eecf15f Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/4265220 Tested-by: Jes Klinke <jbk@chromium.org> Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org> Commit-Queue: Jes Klinke <jbk@chromium.org>
-rw-r--r--chip/stm32/adc-stm32l4.c4
-rw-r--r--chip/stm32/adc-stm32l5.c6
-rw-r--r--chip/stm32/adc_chip.h7
-rw-r--r--chip/stm32/registers-stm32l5.h1
4 files changed, 12 insertions, 6 deletions
diff --git a/chip/stm32/adc-stm32l4.c b/chip/stm32/adc-stm32l4.c
index e67ae4a8fd..acf8444e7c 100644
--- a/chip/stm32/adc-stm32l4.c
+++ b/chip/stm32/adc-stm32l4.c
@@ -35,14 +35,12 @@ struct adc_profile_t {
#endif
#endif
-#if defined(CHIP_FAMILY_STM32L4)
#define ADC_CALIBRATION_TIMEOUT_US 100000U
#define ADC_ENABLE_TIMEOUT_US 200000U
#define ADC_CONVERSION_TIMEOUT_US 200000U
#define NUMBER_OF_ADC_CHANNEL 2
-uint8_t adc1_initialized;
-#endif
+static uint8_t adc1_initialized;
#ifdef CONFIG_ADC_PROFILE_FAST_CONTINUOUS
diff --git a/chip/stm32/adc-stm32l5.c b/chip/stm32/adc-stm32l5.c
new file mode 100644
index 0000000000..94a85fb70b
--- /dev/null
+++ b/chip/stm32/adc-stm32l5.c
@@ -0,0 +1,6 @@
+/* Copyright 2021 The ChromiumOS Authors
+ * Use of this source code is governed by a BSD-style license that can be
+ * found in the LICENSE file.
+ */
+
+#include "adc-stm32l4.c"
diff --git a/chip/stm32/adc_chip.h b/chip/stm32/adc_chip.h
index 2c4e726ea5..18a280a9d8 100644
--- a/chip/stm32/adc_chip.h
+++ b/chip/stm32/adc_chip.h
@@ -8,7 +8,7 @@
#ifndef __CROS_EC_ADC_CHIP_H
#define __CROS_EC_ADC_CHIP_H
-#ifdef CHIP_FAMILY_STM32L4
+#if defined(CHIP_FAMILY_STM32L4) || defined(CHIP_FAMILY_STM32L5)
enum stm32_adc_smpr {
STM32_ADC_SMPR_DEFAULT = 0,
STM32_ADC_SMPR_2_5_CY,
@@ -43,11 +43,12 @@ struct adc_t {
int factor_div;
int shift;
int channel;
-#ifdef CHIP_FAMILY_STM32L4
+#if defined(CHIP_FAMILY_STM32L4) || defined(CHIP_FAMILY_STM32L5)
int rank;
#endif
-#if defined(CHIP_FAMILY_STM32F0) || defined(CHIP_FAMILY_STM32L4)
+#if defined(CHIP_FAMILY_STM32F0) || defined(CHIP_FAMILY_STM32L4) || \
+ defined(CHIP_FAMILY_STM32L5)
enum stm32_adc_smpr sample_rate; /* Sampling Rate of the channel */
#endif
};
diff --git a/chip/stm32/registers-stm32l5.h b/chip/stm32/registers-stm32l5.h
index 9a5fe75c95..7af7eba888 100644
--- a/chip/stm32/registers-stm32l5.h
+++ b/chip/stm32/registers-stm32l5.h
@@ -202,6 +202,7 @@
#define STM32_GPIOF_BASE (AHB2PERIPH_BASE + 0x21400UL)
#define STM32_GPIOG_BASE (AHB2PERIPH_BASE + 0x21800UL)
#define STM32_GPIOH_BASE (AHB2PERIPH_BASE + 0x21C00UL)
+#define STM32_ADC1_BASE (AHB2PERIPH_BASE + 0x28000UL)
#define STM32_RNG_BASE (AHB2PERIPH_BASE + 0xC4000UL)
/*!< AHB3 peripherals */