diff options
| author | Dino Li <Dino.Li@ite.com.tw> | 2020-11-13 10:01:33 +0800 |
|---|---|---|
| committer | Commit Bot <commit-bot@chromium.org> | 2020-11-18 02:57:08 +0000 |
| commit | 1dcfc09283df045a0071d549d90de04bd90a60f0 (patch) | |
| tree | e3c6b3b18a95cab251b79ede559f401e0983c25d | |
| parent | eb665ee6e1768177dacfa0cadfee783ad8a5d09a (diff) | |
| download | chrome-ec-1dcfc09283df045a0071d549d90de04bd90a60f0.tar.gz | |
it83xx: pull more functions into __ram_code section
Because we have space in the section, so we pulled more functions
into the section. If a function is cached in __ram_code section
(static cache), we can save latency of fetching code of the function
from flash. (Fetching 64 bytes code from flash takes about 4us latency)
BUG=none
BRANCH=none
TEST=buildall.
Asurada and Drawcia are both able to boot to kernel.
Signed-off-by: Dino Li <Dino.Li@ite.com.tw>
Change-Id: I8b413bd577c4e5b73a5c67018d17955da1ed0c55
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2535899
Reviewed-by: Diana Z <dzigterman@chromium.org>
Reviewed-by: Jett Rink <jettrink@chromium.org>
| -rw-r--r-- | chip/it83xx/clock.c | 4 | ||||
| -rw-r--r-- | core/nds32/switch.S | 3 | ||||
| -rw-r--r-- | core/riscv-rv32i/switch.S | 3 |
3 files changed, 6 insertions, 4 deletions
diff --git a/chip/it83xx/clock.c b/chip/it83xx/clock.c index d38197379a..3927091eff 100644 --- a/chip/it83xx/clock.c +++ b/chip/it83xx/clock.c @@ -449,7 +449,7 @@ int clock_ec_wake_from_sleep(void) return ec_sleep; } -void clock_cpu_standby(void) +void __ram_code clock_cpu_standby(void) { /* standby instruction */ if (IS_ENABLED(CHIP_CORE_NDS32)) { @@ -598,7 +598,7 @@ defined(CONFIG_HOSTCMD_ESPI) /** * Low power idle task. Executed when no tasks are ready to be scheduled. */ -void __idle(void) +void __ram_code __idle(void) { console_expire_time.val = get_time().val + CONSOLE_IN_USE_ON_BOOT_TIME; /* init hw timer and clock source is 32.768 KHz */ diff --git a/core/nds32/switch.S b/core/nds32/switch.S index b891aeb2a5..631b0e0fe2 100644 --- a/core/nds32/switch.S +++ b/core/nds32/switch.S @@ -8,7 +8,7 @@ #include "config.h" #include "cpu.h" -.text +.section .ram_code /** * Task context switching @@ -73,6 +73,7 @@ __switch_task: /* restore PC and PSW */ iret +.text /** * Start the task scheduling. * diff --git a/core/riscv-rv32i/switch.S b/core/riscv-rv32i/switch.S index d6c00b8591..b7750975fd 100644 --- a/core/riscv-rv32i/switch.S +++ b/core/riscv-rv32i/switch.S @@ -8,7 +8,7 @@ #include "config.h" #include "cpu.h" -.text +.section .ram_code /** * Task context switching @@ -142,6 +142,7 @@ __switch_task: add sp, t3, zero j __irq_exit +.text /** * Start the task scheduling. */ |