diff options
author | Daisuke Nojiri <dnojiri@chromium.org> | 2023-04-07 16:34:49 -0700 |
---|---|---|
committer | Chromeos LUCI <chromeos-scoped@luci-project-accounts.iam.gserviceaccount.com> | 2023-04-14 00:22:03 +0000 |
commit | 88dfac40f0f5ac328af97bdc5582ec1541a8d702 (patch) | |
tree | 223a24b74c78b0b8c8ef272a94af76ca51804d70 | |
parent | c3d56ca0232e245c1bbfd8405aef84fbf128ddca (diff) | |
download | chrome-ec-88dfac40f0f5ac328af97bdc5582ec1541a8d702.tar.gz |
Hades: Relocate EC_PROCHOT_IN_L
This patch relocates EC_PROCHOT_IN_L from GPIOf0 to GPIOA0.
GPIOA0 is previously used by USB_C0_FRS_EN. FRS control for USB-C0 will
be done by NCT3808.
BUG=b:272815831
BRANCH=None
TEST=make BOARD=hades
Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org>
Change-Id: I008a50257c56cfd44b6fa48951ee2aab71243c7c
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/4409992
Reviewed-by: Tarun Tuli <taruntuli@google.com>
-rw-r--r-- | board/hades/gpio.inc | 4 | ||||
-rw-r--r-- | board/hades/usbc_config.c | 1 |
2 files changed, 2 insertions, 3 deletions
diff --git a/board/hades/gpio.inc b/board/hades/gpio.inc index d2b10fce5d..a3d2865d18 100644 --- a/board/hades/gpio.inc +++ b/board/hades/gpio.inc @@ -9,7 +9,7 @@ /* INTERRUPT GPIOs: */ GPIO_INT(ACOK_OD, PIN(0, 0), GPIO_INT_BOTH | GPIO_HIB_WAKE_HIGH, extpower_interrupt) -GPIO_INT(EC_PROCHOT_IN_L, PIN(F, 0), GPIO_INT_BOTH, throttle_ap_prochot_input_interrupt) +GPIO_INT(EC_PROCHOT_IN_L, PIN(A, 0), GPIO_INT_BOTH, throttle_ap_prochot_input_interrupt) GPIO_INT(EC_WP_ODL, PIN(A, 1), GPIO_INT_BOTH, switch_interrupt) GPIO_INT(GSC_EC_PWR_BTN_ODL, PIN(0, 1), GPIO_INT_BOTH | GPIO_HIB_WAKE_LOW, power_button_interrupt) GPIO_INT(LID_OPEN, PIN(D, 2), GPIO_INT_BOTH | GPIO_HIB_WAKE_HIGH, lid_interrupt) @@ -64,7 +64,6 @@ GPIO(PCH_PWROK, PIN(7, 2), GPIO_OUT_LOW) GPIO(SYS_RST_ODL, PIN(C, 5), GPIO_ODR_HIGH) GPIO(EC_USB_PCH_C0_OC_ODL, PIN(9, 4), GPIO_ODR_HIGH) GPIO(EC_USB_PCH_C2_OC_ODL, PIN(9, 7), GPIO_ODR_HIGH) -GPIO(USB_C0_FRS_EN, PIN(A, 0), GPIO_OUT_LOW) GPIO(VCCST_PWRGD_OD, PIN(A, 4), GPIO_ODR_LOW) GPIO(EN_USB_A_LOW_POWER, PIN(9, 3), GPIO_OUT_LOW) GPIO(PG_PP3300_S5_EC_SEQ_OD, PIN(B, 5), GPIO_OUT_LOW) @@ -108,6 +107,7 @@ ALTERNATE(PIN_MASK(B, 0xC0), 0, MODULE_PWM, 0) /* GPIOB7/PWM5, GPI /* ADC alternate functions */ ALTERNATE(PIN_MASK(3, 0x10), 0, MODULE_ADC, 0) /* GPIO34/PS2_DAT2/ADC6 */ ALTERNATE(PIN_MASK(4, 0x36), 0, MODULE_ADC, 0) /* GPIO42/ADC3/RI_L, GPIO45/ADC0, GPIO44/ADC1, GPIO41/ADC4 */ +/* TODO: GPIOF0/ADC9 for USB_C1_VBUSM */ /* KB alternate functions */ ALTERNATE(PIN_MASK(0, 0xf0), 0, MODULE_KB, GPIO_ODR_HIGH) /* KSO10&P80_CLK/GPIO07, KSO11&P80_DAT/GPIO06, KSO12/GPIO05, KSO13/GPIO04 */ diff --git a/board/hades/usbc_config.c b/board/hades/usbc_config.c index 7511773cc8..fa3ab5bb52 100644 --- a/board/hades/usbc_config.c +++ b/board/hades/usbc_config.c @@ -73,7 +73,6 @@ struct ppc_config_t ppc_chips[] = { [USBC_PORT_C0] = { .i2c_port = I2C_PORT_USB_C0_PPC, .i2c_addr_flags = SYV682X_ADDR0_FLAGS, - .frs_en = GPIO_USB_C0_FRS_EN, .drv = &syv682x_drv, }, [USBC_PORT_C2] = { |