summaryrefslogtreecommitdiff
diff options
context:
space:
mode:
authorRobert Zieba <robertzieba@google.com>2023-03-16 15:41:10 +0000
committerChromeos LUCI <chromeos-scoped@luci-project-accounts.iam.gserviceaccount.com>2023-04-14 17:53:01 +0000
commitffde16edd3b2de6671ae5317e96470988deeb966 (patch)
tree138d5c4222d91134986258b5ba139efcd2ef3d63
parent105e92fd6aff0ff5cc40105ff8d14fbc5767306c (diff)
downloadchrome-ec-ffde16edd3b2de6671ae5317e96470988deeb966.tar.gz
zephyr/emul/anx7483: Add anx7483_emul_test_get_eq function
Add `anx7483_emul_test_get_eq` function. This function will be useful for board tests. BRANCH=none BUG=b:247151116 TEST=Ran tests Change-Id: I88ca9ee6d73eac7db513633f2fdfe590fea8ef92 Signed-off-by: Robert Zieba <robertzieba@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/4345936 Reviewed-by: Jeremy Bettis <jbettis@chromium.org>
-rw-r--r--zephyr/emul/retimer/emul_anx7483.c31
-rw-r--r--zephyr/include/emul/retimer/emul_anx7483.h4
-rw-r--r--zephyr/test/drivers/usbc_retimer/src/anx7483.c60
3 files changed, 68 insertions, 27 deletions
diff --git a/zephyr/emul/retimer/emul_anx7483.c b/zephyr/emul/retimer/emul_anx7483.c
index 37a34b25cf..507eaff2ce 100644
--- a/zephyr/emul/retimer/emul_anx7483.c
+++ b/zephyr/emul/retimer/emul_anx7483.c
@@ -292,6 +292,37 @@ int anx7483_emul_set_reg_reserved_mask(const struct emul *emul, int r,
return 0;
}
+int anx7483_emul_get_eq(const struct emul *emul, enum anx7483_tune_pin pin,
+ enum anx7483_eq_setting *eq)
+{
+ int reg;
+ int rv;
+
+ if (pin == ANX7483_PIN_UTX1)
+ reg = ANX7483_UTX1_PORT_CFG0_REG;
+ else if (pin == ANX7483_PIN_UTX2)
+ reg = ANX7483_UTX2_PORT_CFG0_REG;
+ else if (pin == ANX7483_PIN_URX1)
+ reg = ANX7483_URX1_PORT_CFG0_REG;
+ else if (pin == ANX7483_PIN_URX2)
+ reg = ANX7483_URX2_PORT_CFG0_REG;
+ else if (pin == ANX7483_PIN_DRX1)
+ reg = ANX7483_DRX1_PORT_CFG0_REG;
+ else if (pin == ANX7483_PIN_DRX2)
+ reg = ANX7483_DRX2_PORT_CFG0_REG;
+ else
+ return EC_ERROR_INVAL;
+
+ rv = anx7483_emul_get_reg(emul, reg, (uint8_t *)eq);
+ if (rv)
+ return rv;
+
+ *eq &= ANX7483_CFG0_EQ_MASK;
+ *eq >>= ANX7483_CFG0_EQ_SHIFT;
+
+ return EC_SUCCESS;
+}
+
void anx7483_emul_reset(const struct emul *emul)
{
struct anx7483_emul_data *anx7483 = emul->data;
diff --git a/zephyr/include/emul/retimer/emul_anx7483.h b/zephyr/include/emul/retimer/emul_anx7483.h
index fe528e2e97..2673bebf63 100644
--- a/zephyr/include/emul/retimer/emul_anx7483.h
+++ b/zephyr/include/emul/retimer/emul_anx7483.h
@@ -7,6 +7,7 @@
#define __EMUL_ANX7483_H
#include "driver/retimer/anx7483.h"
+#include "driver/retimer/anx7483_public.h"
#include "emul/emul_common_i2c.h"
#include <zephyr/device.h>
@@ -123,6 +124,9 @@ int anx7483_emul_set_reg(const struct emul *emul, int r, uint8_t val);
int anx7483_emul_set_reg_reserved_mask(const struct emul *emul, int r,
uint8_t mask, uint8_t def);
+int anx7483_emul_get_eq(const struct emul *emul, enum anx7483_tune_pin pin,
+ enum anx7483_eq_setting *eq);
+
void anx7483_emul_reset(const struct emul *emul);
#endif /* __EMUL_ANX7483_H */
diff --git a/zephyr/test/drivers/usbc_retimer/src/anx7483.c b/zephyr/test/drivers/usbc_retimer/src/anx7483.c
index e0d6544b3d..f3f592b480 100644
--- a/zephyr/test/drivers/usbc_retimer/src/anx7483.c
+++ b/zephyr/test/drivers/usbc_retimer/src/anx7483.c
@@ -43,6 +43,18 @@ static int anx7483_emul_test_set_reg(int reg, uint8_t val)
return anx7483_emul_set_reg(ANX7483_EMUL, reg, val);
}
+static int anx7483_emul_test_get_eq(enum anx7483_tune_pin pin,
+ enum anx7483_eq_setting *eq)
+{
+ return anx7483_emul_get_eq(ANX7483_EMUL, pin, eq);
+}
+
+static int anx7483_test_set_eq(enum anx7483_tune_pin pin,
+ enum anx7483_eq_setting eq)
+{
+ return anx7483_set_eq(&mux, pin, eq);
+}
+
static int anx7483_i2c_read(int reg, int *data)
{
return anx7483_read(&mux, reg, data);
@@ -230,55 +242,49 @@ ZTEST(anx7483, test_init)
* equalization for a pin.
*/
-ZTEST(anx7483, test_set_eq)
+ZTEST(anx7483, test_set_eq_func)
{
int rv;
- uint8_t val;
+ enum anx7483_eq_setting eq;
- rv = anx7483_set_eq(&mux, ANX7483_PIN_UTX1, ANX7483_EQ_SETTING_12_5DB);
+ rv = anx7483_test_set_eq(ANX7483_PIN_UTX1, ANX7483_EQ_SETTING_12_5DB);
zexpect_ok(rv);
- rv = anx7483_emul_test_get_reg(ANX7483_UTX1_PORT_CFG0_REG, &val);
+ rv = anx7483_emul_test_get_eq(ANX7483_PIN_UTX1, &eq);
zexpect_ok(rv);
- zexpect_equal((val >> ANX7483_CFG0_EQ_SHIFT) & 0xf,
- ANX7483_EQ_SETTING_12_5DB);
+ zexpect_equal(eq, ANX7483_EQ_SETTING_12_5DB);
- rv = anx7483_set_eq(&mux, ANX7483_PIN_UTX2, ANX7483_EQ_SETTING_12_5DB);
+ rv = anx7483_test_set_eq(ANX7483_PIN_UTX2, ANX7483_EQ_SETTING_12_5DB);
zexpect_ok(rv);
- rv = anx7483_emul_test_get_reg(ANX7483_UTX2_PORT_CFG0_REG, &val);
+ rv = anx7483_emul_test_get_eq(ANX7483_PIN_UTX2, &eq);
zexpect_ok(rv);
- zexpect_equal((val >> ANX7483_CFG0_EQ_SHIFT) & 0xf,
- ANX7483_EQ_SETTING_12_5DB);
+ zexpect_equal(eq, ANX7483_EQ_SETTING_12_5DB);
- rv = anx7483_set_eq(&mux, ANX7483_PIN_URX1, ANX7483_EQ_SETTING_12_5DB);
+ rv = anx7483_test_set_eq(ANX7483_PIN_URX1, ANX7483_EQ_SETTING_12_5DB);
zexpect_ok(rv);
- rv = anx7483_emul_test_get_reg(ANX7483_URX1_PORT_CFG0_REG, &val);
+ rv = anx7483_emul_test_get_eq(ANX7483_PIN_URX1, &eq);
zexpect_ok(rv);
- zexpect_equal((val >> ANX7483_CFG0_EQ_SHIFT) & 0xf,
- ANX7483_EQ_SETTING_12_5DB);
+ zexpect_equal(eq, ANX7483_EQ_SETTING_12_5DB);
- rv = anx7483_set_eq(&mux, ANX7483_PIN_URX2, ANX7483_EQ_SETTING_12_5DB);
+ rv = anx7483_test_set_eq(ANX7483_PIN_URX2, ANX7483_EQ_SETTING_12_5DB);
zexpect_ok(rv);
- rv = anx7483_emul_test_get_reg(ANX7483_URX2_PORT_CFG0_REG, &val);
+ rv = anx7483_emul_test_get_eq(ANX7483_PIN_URX2, &eq);
zexpect_ok(rv);
- zexpect_equal((val >> ANX7483_CFG0_EQ_SHIFT) & 0xf,
- ANX7483_EQ_SETTING_12_5DB);
+ zexpect_equal(eq, ANX7483_EQ_SETTING_12_5DB);
- rv = anx7483_set_eq(&mux, ANX7483_PIN_DRX1, ANX7483_EQ_SETTING_12_5DB);
+ rv = anx7483_test_set_eq(ANX7483_PIN_DRX1, ANX7483_EQ_SETTING_12_5DB);
zexpect_ok(rv);
- rv = anx7483_emul_test_get_reg(ANX7483_URX1_PORT_CFG0_REG, &val);
+ rv = anx7483_emul_test_get_eq(ANX7483_PIN_DRX1, &eq);
zexpect_ok(rv);
- zexpect_equal((val >> ANX7483_CFG0_EQ_SHIFT) & 0xf,
- ANX7483_EQ_SETTING_12_5DB);
+ zexpect_equal(eq, ANX7483_EQ_SETTING_12_5DB);
- rv = anx7483_set_eq(&mux, ANX7483_PIN_DRX2, ANX7483_EQ_SETTING_12_5DB);
+ rv = anx7483_test_set_eq(ANX7483_PIN_DRX2, ANX7483_EQ_SETTING_12_5DB);
zexpect_ok(rv);
- rv = anx7483_emul_test_get_reg(ANX7483_URX2_PORT_CFG0_REG, &val);
+ rv = anx7483_emul_test_get_eq(ANX7483_PIN_DRX2, &eq);
zexpect_ok(rv);
- zexpect_equal((val >> ANX7483_CFG0_EQ_SHIFT) & 0xf,
- ANX7483_EQ_SETTING_12_5DB);
+ zexpect_equal(eq, ANX7483_EQ_SETTING_12_5DB);
/* Test invalid pin. */
- rv = anx7483_set_eq(&mux, 0xff, ANX7483_EQ_SETTING_12_5DB);
+ rv = anx7483_test_set_eq(0xff, ANX7483_EQ_SETTING_12_5DB);
zexpect_not_equal(rv, 0);
}