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authorRandall Spangler <rspangler@chromium.org>2013-04-11 13:39:52 -0700
committerChromeBot <chrome-bot@google.com>2013-04-12 14:13:53 -0700
commit55310297449eea9756e6eed95f7934e265a34de8 (patch)
tree411e1f233a0370704b9b2e69cf5ddfeb6a149144
parentff1c7d68cebdcfecc93f6f683d37b7402b54239a (diff)
downloadchrome-ec-55310297449eea9756e6eed95f7934e265a34de8.tar.gz
Clean up alternate functions on STM32L
The MODER register is used to set (alt-func | analog | gpio-in | gpio-out). So there's no need to force things to be normal GPIOs in board config, since gpio_pre_init() will clear the alternate function-ness as part of setting the GPIO direction. BUG=chrome-os-partner:18657 BRANCH=none TEST=build pit and test-boot on daisy Change-Id: I82db9d9f4d8877464d62c1ff2efaef36822fc0ca Signed-off-by: Randall Spangler <rspangler@chromium.org> Reviewed-on: https://gerrit.chromium.org/gerrit/47904
-rw-r--r--board/pit/board.c30
1 files changed, 9 insertions, 21 deletions
diff --git a/board/pit/board.c b/board/pit/board.c
index 009ff3d031..0ee1ac8bc7 100644
--- a/board/pit/board.c
+++ b/board/pit/board.c
@@ -88,13 +88,16 @@ const struct gpio_info gpio_list[GPIO_COUNT] = {
void board_config_post_gpio_init(void)
{
/* I2C SCL/SDA on PB10-11 and PB6-7 */
- gpio_set_alternate_function(GPIO_B, (1<<11) |
- (1<<10) |
- (1<<7) |
- (1<<6), GPIO_ALT_I2C);
+ gpio_set_alternate_function(GPIO_B,
+ (1 << 11) | (1 << 10) | (1 << 7) | (1 << 6),
+ GPIO_ALT_I2C);
- /* Select Alternate function for USART1 on pins PA9/PA10 */
- gpio_set_alternate_function(GPIO_A, (1<<9) | (1<<10), GPIO_ALT_USART);
+ /* USART1 on pins PA9/PA10 */
+ gpio_set_alternate_function(GPIO_A, (1 << 9) | (1 << 10),
+ GPIO_ALT_USART);
+
+ /* TIM2_CH2 on PB3 */
+ gpio_set_alternate_function(GPIO_B, (1 << 3), GPIO_ALT_TIM2);
#ifdef CONFIG_SPI
/* SPI1 on pins PA4-7 (alt. function push-pull, 10MHz) */
@@ -105,21 +108,6 @@ void board_config_post_gpio_init(void)
gpio_set_flags(GPIO_SPI1_NSS, GPIO_INT_BOTH);
#endif
- /* TODO: which of these are necessary on pit? */
-#ifdef PORT_TO_PIT
-
- /* remap OSC_IN/OSC_OUT to PD0/PD1 */
- STM32_GPIO_AFIO_MAPR |= 1 << 15;
-
- /* use PB3 as a GPIO, so disable JTAG and keep only SWD */
- STM32_GPIO_AFIO_MAPR = (STM32_GPIO_AFIO_MAPR & ~(0x7 << 24))
- | (2 << 24);
-
- /* remap TIM2_CH2 to PB3 */
- STM32_GPIO_AFIO_MAPR = (STM32_GPIO_AFIO_MAPR & ~(0x3 << 8))
- | (1 << 8);
-
-#endif /* PORT_TO_PIT */
}
#ifdef CONFIG_PMU_BOARD_INIT