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| author | Randall Spangler <rspangler@chromium.org> | 2013-07-16 10:23:25 -0700 |
|---|---|---|
| committer | ChromeBot <chrome-bot@google.com> | 2013-07-25 17:25:42 -0700 |
| commit | 245275f4b67a45276aed3a79ee405d91cc1ccef5 (patch) | |
| tree | a3b282af274ff41649ad346cf3432b70d0892ca0 | |
| parent | 298a7276c27d1a7b6402dadfc1b0f2f45247ae2d (diff) | |
| download | chrome-ec-245275f4b67a45276aed3a79ee405d91cc1ccef5.tar.gz | |
Pulse EC_ENTERING_RW instead of just leaving it high
The Silego chip has a 50k pulldown which will leak power if we leave
EC_ENTERING_RW high. We don't need to leave it high, because once the
latch in the Silego gets set it ignores this signal. This is ~100uA,
so it only really matters in S5 on pit (since x86 boards and spring
both hibernate in S5).
BUG=chrome-os-partner:20757
BRANCH=none
TEST=probe ec_in_rw signal before/after sysjump
Change-Id: Ib6b09cfc7718b35e4e93c952c3098c08d53572e2
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/62133
Reviewed-by: Vic Yang <victoryang@chromium.org>
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
| -rw-r--r-- | common/system_common.c | 9 |
1 files changed, 8 insertions, 1 deletions
diff --git a/common/system_common.c b/common/system_common.c index c0dd639034..ecf72c0782 100644 --- a/common/system_common.c +++ b/common/system_common.c @@ -16,6 +16,7 @@ #include "panic.h" #include "system.h" #include "task.h" +#include "timer.h" #include "uart.h" #include "util.h" #include "version.h" @@ -301,9 +302,15 @@ static void jump_to_image(uintptr_t init_addr) /* * Jumping to any image asserts the signal to the Silego chip that that * EC is not in read-only firmware. (This is not technically true if - * jumping from RO -> RO, but that's not a meaningful use case...) + * jumping from RO -> RO, but that's not a meaningful use case...). + * + * Pulse the signal long enough to set the latch in the Silego, then + * drop it again so we don't leak power through the pulldown in the + * Silego. */ gpio_set_level(GPIO_ENTERING_RW, 1); + usleep(MSEC); + gpio_set_level(GPIO_ENTERING_RW, 0); /* Flush UART output unless the UART hasn't been initialized yet */ if (uart_init_done()) |