diff options
author | Vic (Chun-Ju) Yang <victoryang@chromium.org> | 2014-04-28 15:47:20 +0800 |
---|---|---|
committer | chrome-internal-fetch <chrome-internal-fetch@google.com> | 2014-04-30 09:52:07 +0000 |
commit | 306e9a88b93908431ed6946c9c0ae6de309ceeec (patch) | |
tree | cc1db9ab2209384953b57e4a0f998f9513e4cb5b | |
parent | a0d6ac7166d96819d6aa90562c295c2f9d943ded (diff) | |
download | chrome-ec-306e9a88b93908431ed6946c9c0ae6de309ceeec.tar.gz |
Keyborg: Disable SWD ports
Most of the time we don't need to use a debugger during runtime. Let's
disable SWD ports so that we can use the two pins for touch scan.
We can still re-flash the chips as long as we hold the reset pin when
entering SWD mode.
BUG=None
TEST=Check we can still re-flash the chips
BRANCH=None
Change-Id: Ieb34406f4bc6d6a753ec840b3072f363c7b17c08
Signed-off-by: Vic (Chun-Ju) Yang <victoryang@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/197196
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
-rw-r--r-- | board/keyborg/board.c | 4 | ||||
-rw-r--r-- | board/keyborg/hardware.c | 7 |
2 files changed, 7 insertions, 4 deletions
diff --git a/board/keyborg/board.c b/board/keyborg/board.c index f609395316..706c89bdfc 100644 --- a/board/keyborg/board.c +++ b/board/keyborg/board.c @@ -86,8 +86,8 @@ const struct ts_pin col_pins[] = { {TS_GPIO_B, 0}, /* C23 */ {TS_GPIO_G, 2}, /* C24 */ {TS_GPIO_G, 1}, /* C25 */ - {TS_GPIO_A, 10}, /* Fake C26. C26 is used by debugger. */ - {TS_GPIO_A, 10}, /* Fake C27. C27 is used by debugger. */ + {TS_GPIO_A, 13}, /* C26 */ + {TS_GPIO_A, 14}, /* C27 */ {TS_GPIO_B, 3}, /* C28 */ {TS_GPIO_A, 10}, /* Fake C29. C29 is used as UART Tx. */ {TS_GPIO_B, 8}, /* C30 */ diff --git a/board/keyborg/hardware.c b/board/keyborg/hardware.c index c8c106f92b..d1648b0737 100644 --- a/board/keyborg/hardware.c +++ b/board/keyborg/hardware.c @@ -62,9 +62,12 @@ static void power_init(void) static void pins_init(void) { - /* Enable SWD, but disable JTAG. We want JTDI as GPIO. */ + /* + * Disable JTAG and SWD. We want JTDI for UART Tx and SWD pins for + * touch scan. + */ STM32_GPIO_AFIO_MAPR = (STM32_GPIO_AFIO_MAPR & ~(0x7 << 24)) - | (2 << 24); + | (4 << 24); /* * Initial pin usage: |