diff options
| author | Vic Yang <victoryang@chromium.org> | 2014-05-20 14:21:58 -0700 |
|---|---|---|
| committer | chrome-internal-fetch <chrome-internal-fetch@google.com> | 2014-05-21 04:07:57 +0000 |
| commit | 7dd3ee4db371fb70c19a5b709985cd6b67f04906 (patch) | |
| tree | a8a89c670af5504bf4d661886157998597e288f6 | |
| parent | 724cfbc6c4fcec3608db9ec2ef9ad946b7d7e201 (diff) | |
| download | chrome-ec-7dd3ee4db371fb70c19a5b709985cd6b67f04906.tar.gz | |
Keyborg: Switch to HSE
We have a 16MHz oscillator input, so let's use it to save HSI power.
BUG=None
TEST=Build and boot
BRANCH=None
Change-Id: Ia2d97cfc8b97b7f8661112ebbd84952e41b955f2
Signed-off-by: Vic Yang <victoryang@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/200650
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
| -rw-r--r-- | board/keyborg/hardware.c | 18 | ||||
| -rw-r--r-- | chip/stm32/clock-stm32f.c | 2 |
2 files changed, 10 insertions, 10 deletions
diff --git a/board/keyborg/hardware.c b/board/keyborg/hardware.c index d1648b0737..3bc04ae653 100644 --- a/board/keyborg/hardware.c +++ b/board/keyborg/hardware.c @@ -14,17 +14,17 @@ static void clock_init(void) { - /* Ensure that HSI is ON */ - if (!(STM32_RCC_CR & (1 << 1))) { - /* Enable HSI */ - STM32_RCC_CR |= 1 << 0; - /* Wait for HSI to be ready */ - while (!(STM32_RCC_CR & (1 << 1))) + /* Turn on HSE */ + if (!(STM32_RCC_CR & (1 << 17))) { + /* Enable HSE */ + STM32_RCC_CR |= (1 << 18) | (1 << 16); + /* Wait for HSE to be ready */ + while (!(STM32_RCC_CR & (1 << 17))) ; } - /* PLLSRC = HSI/2, PLLMUL = x12 (x HSI/2) = 48MHz */ - STM32_RCC_CFGR = 0x00684000; + /* PLLSRC = HSE/2 = 8MHz, PLLMUL = x6 = 48MHz */ + STM32_RCC_CFGR = 0x00534000; /* Enable PLL */ STM32_RCC_CR |= 1 << 24; /* Wait for PLL to be ready */ @@ -32,7 +32,7 @@ static void clock_init(void) ; /* switch SYSCLK to PLL */ - STM32_RCC_CFGR = 0x00684002; + STM32_RCC_CFGR = 0x00534002; /* wait until the PLL is the clock source */ while ((STM32_RCC_CFGR & 0xc) != 0x8) ; diff --git a/chip/stm32/clock-stm32f.c b/chip/stm32/clock-stm32f.c index ea438a04cd..0cac173965 100644 --- a/chip/stm32/clock-stm32f.c +++ b/chip/stm32/clock-stm32f.c @@ -130,7 +130,7 @@ DECLARE_IRQ(STM32_IRQ_RTC_ALARM, __rtc_alarm_irq, 1); #define RCC_CFGR 0x00680000 #elif defined(BOARD_KEYBORG) #define DESIRED_CPU_CLOCK 48000000 -#define RCC_CFGR 0x00684000 +#define RCC_CFGR 0x00534000 #else #error "Need board-specific clock settings" #endif |