diff options
| author | Alec Berg <alecaberg@chromium.org> | 2014-07-15 08:37:55 -0700 |
|---|---|---|
| committer | chrome-internal-fetch <chrome-internal-fetch@google.com> | 2014-07-17 00:40:40 +0000 |
| commit | 4547f1eac8a05b3424ea7a1872fbd39ffbd4d7b9 (patch) | |
| tree | e8b069f96128f66a75d4d8c4584c10c463debe46 | |
| parent | a975c98fb2f378e4fc94cf73c38fe8afa8cb6eeb (diff) | |
| download | chrome-ec-4547f1eac8a05b3424ea7a1872fbd39ffbd4d7b9.tar.gz | |
firefly: fix bug, correctly set CC transmit to a high speed output
Correctly set CC1 transmit pin to a high speed output.
BUG=none
BRANCH=none
TEST=make -j buildall
Change-Id: I54d0d8ae3ea485728e340430bbb63ecf24c10bd6
Signed-off-by: Alec Berg <alecaberg@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/207995
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
| -rw-r--r-- | board/firefly/usb_pd_config.h | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/board/firefly/usb_pd_config.h b/board/firefly/usb_pd_config.h index eb23bc830c..f47ac0a148 100644 --- a/board/firefly/usb_pd_config.h +++ b/board/firefly/usb_pd_config.h @@ -36,8 +36,8 @@ static inline void spi_enable_clock(void) /* the pins used for communication need to be hi-speed */ static inline void pd_set_pins_speed(void) { - /* 40 MHz pin speed on SPI1 PA4/6/7 */ - STM32_GPIO_OSPEEDR(GPIO_B) |= 0x0000F300; + /* 40 MHz pin speed on SPI1 PA6/7 */ + STM32_GPIO_OSPEEDR(GPIO_A) |= 0x0000F000; /* 40 MHz pin speed on SPI1 PB3/4/5 */ STM32_GPIO_OSPEEDR(GPIO_B) |= 0x00000FC0; /* 40 MHz pin speed on TIM17_CH1 (PB9) */ |