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authorAnton Staaf <robotboy@chromium.org>2014-08-25 11:15:38 -0700
committerchrome-internal-fetch <chrome-internal-fetch@google.com>2014-09-09 20:59:46 +0000
commit9de6cdf9fd0c179d8e20f9811bc1645967621873 (patch)
tree77c8ef4c58224d6ba916ea53bd18477a762a82dd
parentdcf496c788d09cfc1969c2a3608964de299d7a13 (diff)
downloadchrome-ec-9de6cdf9fd0c179d8e20f9811bc1645967621873.tar.gz
Flashing: Force board into reset for flashing
This ensures that nothing previously flashed to the baord can interfere with the flashing operation (by wedging the MCU or putting it into a state that the falshing code can't handle). This also adds a dependency on ec.bin to the flash target, ensuring that the firmware image is up to date when flashing. Signed-off-by: Anton Staaf <robotboy@chromium.org> BRANCH=none TEST=make buildall -j Change-Id: I8cdfa6f5c84ed84d6b6e6b30d6683a23087f2c63 Reviewed-on: https://chromium-review.googlesource.com/215991 Tested-by: Anton Staaf <robotboy@chromium.org> Reviewed-by: Bill Richardson <wfrichar@chromium.org> Commit-Queue: Anton Staaf <robotboy@chromium.org>
-rw-r--r--Makefile.rules2
-rw-r--r--board/discovery-stm32f072/openocd-flash.cfg4
2 files changed, 5 insertions, 1 deletions
diff --git a/Makefile.rules b/Makefile.rules
index 1b27c23500..e5279d8097 100644
--- a/Makefile.rules
+++ b/Makefile.rules
@@ -195,7 +195,7 @@ xrefs: $(call targ_if_prog,etags,$(out)/TAGS) \
$(call targ_if_prog,ctags,$(out)/tags)
.PHONY: flash
-flash:
+flash: $(out)/ec.bin
openocd -c "set BOARD $(BOARD)"\
-c "set BUILD_DIR $(out)"\
-f board/$(BOARD)/openocd-flash.cfg
diff --git a/board/discovery-stm32f072/openocd-flash.cfg b/board/discovery-stm32f072/openocd-flash.cfg
index eed8d03f36..d1b847a741 100644
--- a/board/discovery-stm32f072/openocd-flash.cfg
+++ b/board/discovery-stm32f072/openocd-flash.cfg
@@ -4,6 +4,10 @@
source [find board/stm32f0discovery.cfg]
+# For flashing, force the board into reset on connect, this ensures that
+# code running on the core can't interfere with programming.
+reset_config connect_assert_srst
+
gdb_port 0
tcl_port 0
telnet_port 0