Veyron: remove the pmic reset in power_on

Alex did the reset workaround in power_on function.
<https://chromium-review.googlesource.com/#/c/214360/>
Now, the new version RK808 has fixed this issue, so we needn't this
workaround.

BUG=chrome-os-partner:35976
BRANCH=veyron
TEST=The BUCK1_ON_VSEL register default value is 0x18, and coreboot and
kernel will change this register to other value, but never set 0x18 to
it. So we can read this register in coreboot and print out to console to
check whether the RK808 reset to default after cold reboot. With this
patch, the value always reset to 0x18. I have test on jerry, mighty,
speedy.
TEST=Use "i2cset -f -y 0 0x1b 0x21 0x0f"
Power up system: it should power back up
TEST=Use "i2cset -f -y 0 0x1b 0x21 0x0f"
Press refresh-power: system should reboot
TEST=Use "i2cset -f -y 0 0x1b 0x2a 0x00"
Shut down and power back up.
Use "i2cget -f -y 0 0x1b 0x2a". Confirm back to 0xff.
TEST=Use "i2cset -f -y 0 0x1b 0x2a 0x00"
Press refresh-power: system should reboot
Use "i2cget -f -y 0 0x1b 0x2a". Confirm back to 0xff.

Change-Id: Icfdd3a7eeadce2c597bf286b36bea0aa58cfe4c4
Signed-off-by: Chris Zhong <zyw@rock-chips.com>
Signed-off-by: Alexandru M Stan <amstan@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/243202
Reviewed-by: Douglas Anderson <dianders@chromium.org>

1 files changed, 0 insertions, 22 deletions

diff --git a/power/rockchip.c b/power/rockchip.c
index 25d1addb71..272f768615 100644
--- a/power/rockchip.c
+++ b/power/rockchip.c
@@ -78,12 +78,6 @@
  */
 #define PMIC_STARTUP_MS 300
 
-/*
- * Hold time fo the RK808 PMIC reset.
- */
-#define PMIC_RESET_HOLD_TIME (50 * MSEC)
-
-
 /* TODO(crosbug.com/p/25047): move to HOOK_POWER_BUTTON_CHANGE */
 /* 1 if the power button was pressed last time we checked */
 static char power_button_was_pressed;
@@ -113,18 +107,6 @@ static void chipset_turn_off_power_rails(void);
 
 
 /**
- * Set the PMIC RESET signal.
- *
- * @param asserted	Resetting (=1) or idle (=0)
- */
-static void set_pmic_reset(int asserted)
-{
-	/* Signal is active-high */
-	gpio_set_level(GPIO_PMIC_RESET, asserted ? 1 : 0);
-}
-
-
-/**
  * Set the PMIC WARM RESET signal.
  *
  * @param asserted	Resetting (=0) or idle (=1)
@@ -372,10 +354,6 @@ static void power_on(void)
 	for (i = 0; i < PMIC_STARTUP_MS; i++)
 		usleep(1 * MSEC);
 
-	/* Reset the PMIC to make sure it's in a known state. */
-	set_pmic_reset(1);
-	usleep(PMIC_RESET_HOLD_TIME);
-	set_pmic_reset(0);
 	set_pmic_warm_reset(0);
 }