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| author | Duncan Laurie <dlaurie@chromium.org> | 2015-02-19 15:52:49 -0800 |
|---|---|---|
| committer | ChromeOS Commit Bot <chromeos-commit-bot@chromium.org> | 2015-02-20 20:51:26 +0000 |
| commit | 44adcf4dd75c553b3b11720693a3f7f07e26d9d4 (patch) | |
| tree | 23b4952d0e9003b733f6044a2e06b834e18b2015 | |
| parent | 9de97e87547dd929e377b80b95ee279d0087feba (diff) | |
| download | chrome-ec-44adcf4dd75c553b3b11720693a3f7f07e26d9d4.tar.gz | |
samus: Only enable VCORE_PGOOD interrupt when it is valid
The VCORE_PGOOD signal to the EC goes through a buffer which is
powered by PP1050_VCCST that itself is gated by SLP_S3. Until
this point the input is invalid and may be oscillating so only
enable it as an interrupt once we are in S3->S0 state.
BUG=chrome-os-partner:36864
BRANCH=samus
TEST=boot on samus to ensure power sequencing still works properly
Change-Id: I90ad3b578297a5194c110407be1cba2d65226290
Signed-off-by: Duncan Laurie <dlaurie@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/251324
Reviewed-by: Alec Berg <alecaberg@chromium.org>
| -rw-r--r-- | board/samus/power_sequence.c | 15 |
1 files changed, 15 insertions, 0 deletions
diff --git a/board/samus/power_sequence.c b/board/samus/power_sequence.c index eddddcc0a6..daca4ae4ef 100644 --- a/board/samus/power_sequence.c +++ b/board/samus/power_sequence.c @@ -81,6 +81,7 @@ static void chipset_force_g3(void) { CPRINTS("Forcing G3"); + gpio_disable_interrupt(GPIO_VCORE_PGOOD); gpio_set_level(GPIO_PCH_PWROK, 0); gpio_set_level(GPIO_SYS_PWROK, 0); gpio_set_level(GPIO_PP1050_EN, 0); @@ -370,11 +371,19 @@ enum power_state power_handle_state(enum power_state state) */ gpio_set_level(GPIO_CPU_PROCHOT, throttle_cpu); + /* + * VCORE_PGOOD signal buffer is powered by PP1050_VCCST which + * is gated by SLP_S3 assertion. Now the signal is valid and + * can be enabled as an interrupt source. + */ + gpio_enable_interrupt(GPIO_VCORE_PGOOD); + /* Set PCH_PWROK */ gpio_set_level(GPIO_PCH_PWROK, 1); /* Wait for VCORE_PGOOD before enabling SYS_PWROK */ if (power_wait_signals(IN_PGOOD_VCORE)) { + gpio_disable_interrupt(GPIO_VCORE_PGOOD); hook_notify(HOOK_CHIPSET_SUSPEND); enable_sleep(SLEEP_MASK_AP_RUN); gpio_set_level(GPIO_PCH_PWROK, 0); @@ -429,6 +438,12 @@ enum power_state power_handle_state(enum power_state state) /* Turn off DSW gated */ gpio_set_level(GPIO_PP3300_DSW_GATED_EN, 0); + /* + * VCORE_PGOOD signal buffer is powered by PP1050_VCCST which + * is gated by SLP_S3 assertion. The signal is no longer + * valid and should be disabled as an interrupt source. + */ + gpio_disable_interrupt(GPIO_VCORE_PGOOD); return POWER_S3; case POWER_S3S5: |