diff options
author | Shawn Nematbakhsh <shawnn@chromium.org> | 2015-02-28 13:12:54 -0800 |
---|---|---|
committer | ChromeOS Commit Bot <chromeos-commit-bot@chromium.org> | 2015-03-04 22:08:09 +0000 |
commit | 1746c5b0d9b369bf8d11600ef822ae65f84c9fc1 (patch) | |
tree | 3a52a04a52770120c2023e2984562fb8e4066665 | |
parent | 7f48c9a6b3029478cc78e60bec9fb3cc2859af92 (diff) | |
download | chrome-ec-1746c5b0d9b369bf8d11600ef822ae65f84c9fc1.tar.gz |
pi3usb9281: Always set reserved control bits
Bits 1 and 3 of the control register are read 1, write 1, but RO
firmware may have zero'd these bits. Therefore, always set the bits
high, ignoring the read value.
TEST=Manual on Samus. Starting from .90 RO, flash new RW and verify
BC1.2 charger detection is working.
BUG=chrome-os-partner:37241
BRANCH=Samus
Change-Id: I2f71718f74e50fe9b664dbe3da1578ee4c995136
Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/254880
Reviewed-by: Alec Berg <alecaberg@chromium.org>
-rw-r--r-- | driver/pi3usb9281.h | 2 | ||||
-rw-r--r-- | driver/usb_switch_pi3usb9281.c | 22 |
2 files changed, 14 insertions, 10 deletions
diff --git a/driver/pi3usb9281.h b/driver/pi3usb9281.h index 49a078ee6f..56b126c1e3 100644 --- a/driver/pi3usb9281.h +++ b/driver/pi3usb9281.h @@ -26,6 +26,8 @@ #define PI3USB9281_CTRL_SWITCH_AUTO (1 << 4) /* Bits 5 thru 7 are read X, write 0 */ #define PI3USB9281_CTRL_MASK 0x1f +/* Bits 1 and 3 are read 1, write 1 */ +#define PI3USB9281_CTRL_RSVD_1 0x0a #define PI3USB9281_PIN_MANUAL_VBUS (3 << 0) #define PI3USB9281_PIN_MANUAL_DP (1 << 2) diff --git a/driver/usb_switch_pi3usb9281.c b/driver/usb_switch_pi3usb9281.c index 2c69d2471e..1841a9909a 100644 --- a/driver/usb_switch_pi3usb9281.c +++ b/driver/usb_switch_pi3usb9281.c @@ -73,6 +73,14 @@ int pi3usb9281_write(uint8_t chip_idx, uint8_t reg, uint8_t val) return res; } +/* Write control register, taking care to correctly set reserved bits. */ +static int pi3usb9281_write_ctrl(uint8_t chip_idx, uint8_t ctrl) +{ + return pi3usb9281_write(chip_idx, PI3USB9281_REG_CONTROL, + (ctrl & PI3USB9281_CTRL_MASK) | + PI3USB9281_CTRL_RSVD_1); +} + int pi3usb9281_enable_interrupts(uint8_t chip_idx) { uint8_t ctrl = pi3usb9281_read(chip_idx, PI3USB9281_REG_CONTROL); @@ -80,9 +88,7 @@ int pi3usb9281_enable_interrupts(uint8_t chip_idx) if (ctrl == 0xee) return EC_ERROR_UNKNOWN; - return pi3usb9281_write(chip_idx, PI3USB9281_REG_CONTROL, - ctrl & ~PI3USB9281_CTRL_INT_DIS & - PI3USB9281_CTRL_MASK); + return pi3usb9281_write_ctrl(chip_idx, ctrl & ~PI3USB9281_CTRL_INT_DIS); } int pi3usb9281_disable_interrupts(uint8_t chip_idx) @@ -93,9 +99,7 @@ int pi3usb9281_disable_interrupts(uint8_t chip_idx) if (ctrl == 0xee) return EC_ERROR_UNKNOWN; - rv = pi3usb9281_write(chip_idx, PI3USB9281_REG_CONTROL, - (ctrl | PI3USB9281_CTRL_INT_DIS) & - PI3USB9281_CTRL_MASK); + rv = pi3usb9281_write_ctrl(chip_idx, ctrl | PI3USB9281_CTRL_INT_DIS); pi3usb9281_get_interrupts(chip_idx); return rv; } @@ -190,8 +194,7 @@ int pi3usb9281_set_switch_manual(uint8_t chip_idx, int val) else ctrl |= PI3USB9281_CTRL_AUTO; - return pi3usb9281_write(chip_idx, PI3USB9281_REG_CONTROL, - ctrl & PI3USB9281_CTRL_MASK); + return pi3usb9281_write_ctrl(chip_idx, ctrl); } int pi3usb9281_set_pins(uint8_t chip_idx, uint8_t val) @@ -211,8 +214,7 @@ int pi3usb9281_set_switches(uint8_t chip_idx, int open) else ctrl |= PI3USB9281_CTRL_SWITCH_AUTO; - return pi3usb9281_write(chip_idx, PI3USB9281_REG_CONTROL, - ctrl & PI3USB9281_CTRL_MASK); + return pi3usb9281_write_ctrl(chip_idx, ctrl); } static void pi3usb9281_init(void) |