diff options
| author | Kevin K Wong <kevin.k.wong@intel.com> | 2015-03-03 08:58:56 -0800 |
|---|---|---|
| committer | ChromeOS Commit Bot <chromeos-commit-bot@chromium.org> | 2015-04-14 01:15:38 +0000 |
| commit | e4006bbace5fbd14a6c764cdb273d02d58da8dd9 (patch) | |
| tree | e4fb6c0ed30060f8f5f641312a43f3c9a8bbaff3 | |
| parent | 8580227b4064dff3437a7b81eaabeb0e999c7492 (diff) | |
| download | chrome-ec-e4006bbace5fbd14a6c764cdb273d02d58da8dd9.tar.gz | |
mec1322: Updated code to only clear the interrupt status bit of LPC_RESET#.
Interrupt Source register is R/WC, so |= should not be used.
BUG=none
TEST=Verified LPC_RESET# is detected by interrupt handler via EC console.
BRANCH=none
Change-Id: Ib553c839e1311538b17a4d9fbc10c9df5b7e6b44
Signed-off-by: Kevin K Wong <kevin.k.wong@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/265502
Reviewed-by: Shawn N <shawnn@chromium.org>
| -rw-r--r-- | chip/mec1322/lpc.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/chip/mec1322/lpc.c b/chip/mec1322/lpc.c index fa092a67a8..635e2e64de 100644 --- a/chip/mec1322/lpc.c +++ b/chip/mec1322/lpc.c @@ -192,7 +192,7 @@ static void setup_lpc(void) gpio_config_module(MODULE_LPC, 1); /* Set up interrupt on LRESET# deassert */ - MEC1322_INT_SOURCE(19) |= 1 << 1; + MEC1322_INT_SOURCE(19) = 1 << 1; MEC1322_INT_ENABLE(19) |= 1 << 1; MEC1322_INT_BLK_EN |= 1 << 19; task_enable_irq(MEC1322_IRQ_GIRQ19); @@ -283,7 +283,7 @@ void girq19_interrupt(void) lpc_get_pltrst_asserted() ? "" : "de"); /* Clear interrupt source */ - MEC1322_INT_SOURCE(19) |= 1 << 1; + MEC1322_INT_SOURCE(19) = 1 << 1; } } DECLARE_IRQ(MEC1322_IRQ_GIRQ19, girq19_interrupt, 1); |