diff options
| author | Bill Richardson <wfrichar@chromium.org> | 2015-04-14 16:16:57 -0700 |
|---|---|---|
| committer | ChromeOS Commit Bot <chromeos-commit-bot@chromium.org> | 2015-04-15 21:39:08 +0000 |
| commit | 6ab1f5b703ed76195f12df67fd0af6aa37ee9473 (patch) | |
| tree | ef5cb96a96d4dddf02657c1093894045c632abdf | |
| parent | 5654dedc875e8e95b564f506550f8596105f0cc5 (diff) | |
| download | chrome-ec-6ab1f5b703ed76195f12df67fd0af6aa37ee9473.tar.gz | |
usb: Remove unnecessary alignment for descriptors
This was causing the amount of data sent to be larger than the
total size of the descriptors.
Before this CL, connecting the Cr50 through USB gave this kernel
message:
usb 2-1.4.7: config 1 descriptor has 1 excess byte, ignoring
When the host requests the descriptor, the code in chip/*/usb.c
that handles it looks like this:
case USB_DT_CONFIGURATION: /* Setup : Get configuration desc */
desc = __usb_desc;
len = USB_DESC_SIZE;
break;
But include/usb.h has this:
#define USB_DESC_SIZE (__usb_desc_end - __usb_desc)
And both __usb_desc and __usb_desc_end come from the linker
script.
BUG=none
BRANCH=none
TEST=manual
Before this change, I built the Cr50 firmware from m/master,
tried it, and got the dmesg complaint on the host.
After this change, the dmesg complaint doesn't show up anymore.
Change-Id: I83ae2333a9e76af7acb18bd2f0e4cef5c095862a
Signed-off-by: Bill Richardson <wfrichar@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/265765
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
| -rw-r--r-- | core/cortex-m/ec.lds.S | 1 |
1 files changed, 0 insertions, 1 deletions
diff --git a/core/cortex-m/ec.lds.S b/core/cortex-m/ec.lds.S index 915a8224f6..7315740391 100644 --- a/core/cortex-m/ec.lds.S +++ b/core/cortex-m/ec.lds.S @@ -154,7 +154,6 @@ SECTIONS __usb_desc = .; KEEP(*(.rodata.usb_desc_conf)) KEEP(*(SORT(.rodata.usb_desc*))) - . = ALIGN(2); /* USB transfers enjoy 16-bit aligned size */ __usb_desc_end = .; . = ALIGN(4); KEEP(*(.rodata.usb_ep)) |