diff options
| author | Alec Berg <alecaberg@chromium.org> | 2015-04-23 14:39:41 -0700 |
|---|---|---|
| committer | ChromeOS Commit Bot <chromeos-commit-bot@chromium.org> | 2015-04-24 02:47:19 +0000 |
| commit | 934f345ec566aca297a72f8548a36cc024e5f64a (patch) | |
| tree | a269a70a7ea79f65716693c0379f5b7b08af33c5 | |
| parent | 9aea3710b22a5e235ddd03a62daa0d60dc913aa9 (diff) | |
| download | chrome-ec-934f345ec566aca297a72f8548a36cc024e5f64a.tar.gz | |
pd: ignore cable reset
Identify and ignore cable reset PD command
BUG=chrome-os-partner:39464
BRANCH=samus
TEST=connect two samus'. on one samus add code to send a cable
reset like such:
int send_cable_reset(int port)
{
int off;
CPRINTF("C%d Send cable reset\n", port);
/* 64-bit preamble */
off = pd_write_preamble(port);
/* Hard-Reset: 3x RST-1 + 1x RST-2 */
off = pd_write_sym(port, off, BMC(PD_RST1));
off = pd_write_sym(port, off, BMC(PD_SYNC1));
off = pd_write_sym(port, off, BMC(PD_RST1));
off = pd_write_sym(port, off, BMC(PD_SYNC3));
/* Ensure that we have a final edge */
off = pd_write_last_edge(port, off);
/* Transmit the packet */
if (pd_start_tx(port, pd[port].polarity, off) < 0) {
pd[port].send_error = -5;
return -5;
}
pd_tx_done(port, pd[port].polarity);
/* Keep RX monitoring on */
pd_rx_enable_monitoring(port);
return 0;
}
Without this CL, the receiving samus times out and ends
up causing equivalent of hard reset. With this CL, we receive
cable reset and drop it.
Also used twinkie to measure goodCRC delay. No measureable
change in delay on samus and zinger. Samus delay is ~70us and
zinger delay is ~65us.
Change-Id: Ic0e871c8cf96502b861f430e05ee145881fb55fa
Signed-off-by: Alec Berg <alecaberg@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/266981
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
| -rw-r--r-- | chip/stm32/usb_pd_phy.c | 4 | ||||
| -rw-r--r-- | common/usb_pd_protocol.c | 10 | ||||
| -rw-r--r-- | include/usb_pd.h | 10 |
3 files changed, 14 insertions, 10 deletions
diff --git a/chip/stm32/usb_pd_phy.c b/chip/stm32/usb_pd_phy.c index 1db963c588..6c53281346 100644 --- a/chip/stm32/usb_pd_phy.c +++ b/chip/stm32/usb_pd_phy.c @@ -180,7 +180,9 @@ int pd_find_preamble(int port) if (all == 0x36db6db6) return bit - 1; /* should be SYNC-1 */ if (all == 0xF33F3F3F) - return -2; /* got HARD-RESET */ + return PD_ERR_HARD_RESET; /* got HARD-RESET */ + if (all == 0x3c7fe0ff) + return PD_ERR_CABLE_RESET; /* got CABLE-RESET */ } return -1; } diff --git a/common/usb_pd_protocol.c b/common/usb_pd_protocol.c index 803f1a615e..978e862d3e 100644 --- a/common/usb_pd_protocol.c +++ b/common/usb_pd_protocol.c @@ -1449,9 +1449,9 @@ int pd_analyze_rx(int port, uint32_t *payload) /* Detect preamble */ bit = pd_find_preamble(port); - if (bit == -2) { - /* Hard reset */ - return -2; + if (bit == PD_ERR_HARD_RESET || bit == PD_ERR_CABLE_RESET) { + /* Hard reset or cable reset */ + return bit; } else if (bit < 0) { msg = "Preamble"; goto packet_err; @@ -1464,10 +1464,10 @@ int pd_analyze_rx(int port, uint32_t *payload) break; } else if (val == PD_SOP_PRIME) { CPRINTF("SOP'\n"); - return -5; + return PD_ERR_UNSUPPORTED_SOP; } else if (val == PD_SOP_PRIME_PRIME) { CPRINTF("SOP''\n"); - return -5; + return PD_ERR_UNSUPPORTED_SOP; } } if (bit < 0) { diff --git a/include/usb_pd.h b/include/usb_pd.h index 97dbeed51e..478f840193 100644 --- a/include/usb_pd.h +++ b/include/usb_pd.h @@ -14,10 +14,12 @@ #define PD_HOST_COMMAND_TIMEOUT_US SECOND enum pd_errors { - PD_ERR_INVAL = -1, /* Invalid packet */ - PD_ERR_HARD_RESET = -2, /* Got a Hard-Reset packet */ - PD_ERR_CRC = -3, /* CRC mismatch */ - PD_ERR_ID = -4, /* Invalid ID number */ + PD_ERR_INVAL = -1, /* Invalid packet */ + PD_ERR_HARD_RESET = -2, /* Got a Hard-Reset packet */ + PD_ERR_CRC = -3, /* CRC mismatch */ + PD_ERR_ID = -4, /* Invalid ID number */ + PD_ERR_UNSUPPORTED_SOP = -5, /* Unsupported SOP */ + PD_ERR_CABLE_RESET = -6 /* Got a Cable-Reset packet */ }; /* incoming packet event (for the USB PD task) */ |