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| author | Divya Jyothi <divya.jyothi@intel.com> | 2015-04-24 14:33:18 -0700 |
|---|---|---|
| committer | ChromeOS Commit Bot <chromeos-commit-bot@chromium.org> | 2015-04-27 22:11:31 +0000 |
| commit | b35e4d47fc55a8ad1e1aa3f9818576176510008d (patch) | |
| tree | c3b3c6b85da934fea8b70dbc7b457eb47b678e11 | |
| parent | 6ab5d9b8d011d54abf25ac981f45ba0f1766d7b4 (diff) | |
| download | chrome-ec-b35e4d47fc55a8ad1e1aa3f9818576176510008d.tar.gz | |
mec1322: I2c wedge corrected
i2c levels were not reporting correct value as programming the
controller to switch to Bit Bang mode was not enabled.
BUG=chrome-os-partner:39400
BRANCH=None
TEST=Wedge condition was simulated and unwedge was validated using
Oscilloscope
1. SDA was grounded, ran i2cxfer console command,
SCL line creates pulses when SDA gets wedged.
2.SCL was grounded to create cloack stretching, ran i2cxfer console
command and unwedge was confirmed.
Change-Id: Id96d8460820b7d19961ed94d1262112ebd146636
Signed-off-by: Divya Jyothi <divya.jyothi@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/267137
Reviewed-by: Shawn N <shawnn@chromium.org>
| -rw-r--r-- | chip/mec1322/i2c.c | 11 |
1 files changed, 10 insertions, 1 deletions
diff --git a/chip/mec1322/i2c.c b/chip/mec1322/i2c.c index e9491d31b9..3d86c1c881 100644 --- a/chip/mec1322/i2c.c +++ b/chip/mec1322/i2c.c @@ -202,7 +202,16 @@ static void select_port(int port) static inline int get_line_level(int controller) { - return (MEC1322_I2C_BB_CTRL(controller) >> 5) & 0x3; + int ret, ctrl; + /* + * We need to enable BB (Bit Bang) mode in order to read line level + * properly, othervise line levels return always idle (0x60). + */ + ctrl = MEC1322_I2C_BB_CTRL(controller); + MEC1322_I2C_BB_CTRL(controller) |= 1; + ret = (MEC1322_I2C_BB_CTRL(controller) >> 5) & 0x3; + MEC1322_I2C_BB_CTRL(controller) = ctrl; + return ret; } int i2c_xfer(int port, int slave_addr, const uint8_t *out, int out_size, |