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| author | Shawn Nematbakhsh <shawnn@chromium.org> | 2015-05-27 19:21:27 -0700 |
|---|---|---|
| committer | ChromeOS Commit Bot <chromeos-commit-bot@chromium.org> | 2015-05-28 19:08:18 +0000 |
| commit | 38c5ed205314691e1bf09b34324d1c25fbe44e55 (patch) | |
| tree | 4c6055bb365b5fc2341aedda844776f33e2dea70 | |
| parent | e71ce1be8f72d12350df2cfce0a7f3f16912c8d2 (diff) | |
| download | chrome-ec-38c5ed205314691e1bf09b34324d1c25fbe44e55.tar.gz | |
power: skylake: Always mirror rsmrst input to output
This change will help us to debug power sequencing and will likely need
to be reverted later.
BUG=chrome-os-partner:40677
BRANCH=none
TEST=sequence to S0 on glados and stay there
Change-Id: I85d1f0f97a3c93cf26c766a749feb23f9cf4ac62
Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/273680
Reviewed-by: Duncan Laurie <dlaurie@chromium.org>
| -rw-r--r-- | power/skylake.c | 8 |
1 files changed, 2 insertions, 6 deletions
diff --git a/power/skylake.c b/power/skylake.c index bce0069472..31b6c61944 100644 --- a/power/skylake.c +++ b/power/skylake.c @@ -47,14 +47,12 @@ void chipset_force_shutdown(void) * Force off. This condition will reset once the state machine * transitions to G3. */ - gpio_set_level(GPIO_PCH_RSMRST_L, 0); } void chipset_force_g3(void) { CPRINTS("Forcing G3"); - gpio_set_level(GPIO_PCH_RSMRST_L, 0); gpio_set_level(GPIO_PP1800_DX_SENSOR_EN, 0); gpio_set_level(GPIO_PP1800_DX_AUDIO_EN, 0); gpio_set_level(GPIO_PP3300_WLAN_EN, 0); @@ -115,6 +113,8 @@ enum power_state power_chipset_init(void) enum power_state power_handle_state(enum power_state state) { + gpio_set_level(GPIO_PCH_RSMRST_L, gpio_get_level(GPIO_RSMRST_L_PGOOD)); + switch (state) { case POWER_G3: break; @@ -154,9 +154,6 @@ enum power_state power_handle_state(enum power_state state) return POWER_G3; } - /* Deassert RSMRST# */ - gpio_set_level(GPIO_PCH_RSMRST_L, 1); - return POWER_S5; case POWER_S5S3: @@ -235,7 +232,6 @@ enum power_state power_handle_state(enum power_state state) return POWER_S5G3; case POWER_S5G3: - gpio_set_level(GPIO_PCH_RSMRST_L, 0); return POWER_G3; default: |