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authorAlec Berg <alecaberg@chromium.org>2015-06-02 15:54:23 -0700
committerChromeOS Commit Bot <chromeos-commit-bot@chromium.org>2015-06-03 03:50:13 +0000
commit884a72b7529a7c156c14b988bf8f78917b49e9af (patch)
tree26d8faebf99e06f8345107d5e93ba5cedf938527
parente3cd6444aac2e978af8d149b208a4a0acf10b2d4 (diff)
downloadchrome-ec-884a72b7529a7c156c14b988bf8f78917b49e9af.tar.gz
glados_pd: clean-up end of PD transmission
Clean up pd_tx_disable() so that it doesn't toggle a couple times when we stop transmitting. Need to first set the CC pin to Hi-Z and then the TX_DATA line since the CC pin is normally held low during transmission. BUG=none BRANCH=none TEST=test on glados. use twinkie to capture traffic and note that without this change, the CC line toggles an extra time at the end of each transmission. With this change it is a lot cleaner. Change-Id: If26c7a10bbb08bc55b972bb0145115836579d37b Signed-off-by: Alec Berg <alecaberg@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/274884 Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
-rw-r--r--board/glados_pd/usb_pd_config.h8
1 files changed, 3 insertions, 5 deletions
diff --git a/board/glados_pd/usb_pd_config.h b/board/glados_pd/usb_pd_config.h
index 345bcf7038..1be7451507 100644
--- a/board/glados_pd/usb_pd_config.h
+++ b/board/glados_pd/usb_pd_config.h
@@ -170,23 +170,20 @@ static inline void pd_tx_enable(int port, int polarity)
static inline void pd_tx_disable(int port, int polarity)
{
if (port == 0) {
- /* output low on SPI TX to disable the FET */
if (polarity) {/* PA6 is SPI1 MISO */
- gpio_set_alternate_function(GPIO_A, 0x0040, -1);
/* set ADC PA4 pin to ADC function (Hi-Z) */
STM32_GPIO_MODER(GPIO_A) = (STM32_GPIO_MODER(GPIO_A)
| (3 << (2*4))) /* PA4 as ADC */
& ~(1 << (2*4)); /* disable GPO */
+ gpio_set_alternate_function(GPIO_A, 0x0040, -1);
} else {/* PB4 is SPI1 MISO */
- gpio_set_alternate_function(GPIO_B, 0x0010, -1);
/* set ADC PA4 pin to ADC function (Hi-Z) */
STM32_GPIO_MODER(GPIO_A) = (STM32_GPIO_MODER(GPIO_A)
| (3 << (2*2))) /* PA2 as ADC */
& ~(1 << (2*2)); /* disable GPO */
+ gpio_set_alternate_function(GPIO_B, 0x0010, -1);
}
} else {
- /* output low on SPI TX to disable the FET (PB14) */
- gpio_set_alternate_function(GPIO_B, 0x4000, -1);
if (polarity) {
/* set ADC PA4 pin to ADC function (Hi-Z) */
STM32_GPIO_MODER(GPIO_A) = (STM32_GPIO_MODER(GPIO_A)
@@ -198,6 +195,7 @@ static inline void pd_tx_disable(int port, int polarity)
| (3 << (2*0))) /* PA0 as ADC */
& ~(1 << (2*0)); /* disable GPO */
}
+ gpio_set_alternate_function(GPIO_B, 0x4000, -1);
}
}