mediatek: Fix llama build

The llama AP_RESET GPIO differs in polarity from oak.

BUG=chromium:517250
TEST=`make buildall -j`
BRANCH=None

Change-Id: Id06bf39e758b528d154936a3e8561704fdf4cce9
Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/290950
Commit-Queue: Rong Chang <rongchang@chromium.org>
Tested-by: Rong Chang <rongchang@chromium.org>

5 files changed, 32 insertions, 15 deletions

diff --git a/board/llama/board.c b/board/llama/board.c
index 327eeba920..a8e422b4f9 100644
--- a/board/llama/board.c
+++ b/board/llama/board.c
@@ -78,3 +78,8 @@ void board_config_pre_init(void)
 	 */
 	STM32_SYSCFG_CFGR1 |= (1 << 9) | (1 << 10); /* Remap USART1 RX/TX DMA */
 }
+
+void board_set_ap_reset(int asserted)
+{
+	gpio_set_level(GPIO_AP_RESET_H, asserted);
+}
diff --git a/board/llama/board.h b/board/llama/board.h
index 93993f9759..ecc845d4b8 100644
--- a/board/llama/board.h
+++ b/board/llama/board.h
@@ -93,6 +93,9 @@ enum pwm_channel {
 #define CONFIG_CHARGER_SENSE_RESISTOR_AC 10 /* mOhm */
 #define CONFIG_CHARGER_INPUT_CURRENT 2150 /* mA */
 
+/* Set AP reset pin according to parameter */
+void board_set_ap_reset(int asserted);
+
 #endif				/* !__ASSEMBLER__ */
 
 #endif				/* __CROS_EC_BOARD_H */
diff --git a/board/oak/board.c b/board/oak/board.c
index 5468ae61a3..ba7858ffe1 100644
--- a/board/oak/board.c
+++ b/board/oak/board.c
@@ -27,6 +27,7 @@
 #include "registers.h"
 #include "spi.h"
 #include "switch.h"
+#include "system.h"
 #include "task.h"
 #include "temp_sensor.h"
 #include "temp_sensor_chip.h"
@@ -385,3 +386,23 @@ static void check_ap_reset_second(void)
 }
 DECLARE_HOOK(HOOK_SECOND, check_ap_reset_second, HOOK_PRIO_DEFAULT);
 #endif
+
+/**
+ * Set AP reset.
+ *
+ * PMIC_WARM_RESET_H (PB3) is connected to PMIC RESET before rev < 3.
+ * AP_RESET_L (PC3, CPU_WARM_RESET_L) is connected to PMIC SYSRSTB
+ * after rev >= 3.
+ */
+void board_set_ap_reset(int asserted)
+{
+	if (system_get_board_version() < 3) {
+		/* Signal is active-high */
+		CPRINTS("pmic warm reset(%d)", asserted);
+		gpio_set_level(GPIO_PMIC_WARM_RESET_H, asserted);
+	} else {
+		/* Signal is active-low */
+		CPRINTS("ap warm reset(%d)", asserted);
+		gpio_set_level(GPIO_AP_RESET_L, !asserted);
+	}
+}
diff --git a/board/oak/board.h b/board/oak/board.h
index a8f26a5f7b..b1c9806041 100644
--- a/board/oak/board.h
+++ b/board/oak/board.h
@@ -178,6 +178,8 @@ enum temp_sensor_id {
 
 /* Reset PD MCU */
 void board_reset_pd_mcu(void);
+/* Set AP reset pin according to parameter */
+void board_set_ap_reset(int asserted);
 
 /* Control type-C DP route and hotplug detect signal */
 void board_typec_dp_on(int port);
diff --git a/power/mediatek.c b/power/mediatek.c
index 47a2ce83c2..b0bba88387 100644
--- a/power/mediatek.c
+++ b/power/mediatek.c
@@ -267,25 +267,11 @@ static void set_pmic_pwron(int asserted)
 /**
  * Set the WARM RESET signal.
  *
- * PMIC_WARM_RESET_H (PB3) is stuffed before rev < 3 and connected to PMIC RESET
- * After rev >= 3, this is removed. This should not effected the new board.
- *
- * AP_RESET_L (PC3, CPU_WARM_RESET_L) is stuffed after rev >= 3
- * and connected to PMIC SYSRSTB
- *
  * @param asserted	off (=0) or on (=1)
  */
 static void set_warm_reset(int asserted)
 {
-	if (system_get_board_version() < 3) {
-		/* Signal is active-high */
-		CPRINTS("pmic warm reset(%d)", asserted);
-		gpio_set_level(GPIO_PMIC_WARM_RESET_H, asserted);
-	} else {
-		/* Signal is active-low */
-		CPRINTS("ap warm reset(%d)", asserted);
-		gpio_set_level(GPIO_AP_RESET_L, !asserted);
-	}
+	board_set_ap_reset(asserted);
 }
 
 /**