it8380dev: modify sspi module

We need to modify SSPI module to fix compile fail
due to SPI flash common code changed.

Signed-off-by: Dino Li <dino.li@ite.com.tw>

BRANCH=none
BUG=none
TEST=console "spi_flashinfo" OK

Change-Id: I83bb645eff1e5874d849056df518eea92340c39e
Reviewed-on: https://chromium-review.googlesource.com/290089
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Commit-Queue: Dino Li <dino.li@ite.com.tw>
Tested-by: Dino Li <dino.li@ite.com.tw>

5 files changed, 42 insertions, 29 deletions

diff --git a/board/it8380dev/board.c b/board/it8380dev/board.c
index 130d4ef47f..326ad09c9a 100644
--- a/board/it8380dev/board.c
+++ b/board/it8380dev/board.c
@@ -21,6 +21,7 @@
 #include "pwm.h"
 #include "pwm_chip.h"
 #include "registers.h"
+#include "spi.h"
 #include "switch.h"
 #include "task.h"
 #include "timer.h"
@@ -198,6 +199,12 @@ const struct i2c_port_t i2c_ports[] = {
 };
 const unsigned int i2c_ports_used = ARRAY_SIZE(i2c_ports);
 
+/* SPI devices */
+const struct spi_device_t spi_devices[] = {
+	{ CONFIG_SPI_FLASH_PORT, 0, -1},
+};
+const unsigned int spi_devices_used = ARRAY_SIZE(spi_devices);
+
 /*****************************************************************************/
 /* Console commands */
 
diff --git a/board/it8380dev/board.h b/board/it8380dev/board.h
index 3207cd0d90..5682ec8a81 100644
--- a/board/it8380dev/board.h
+++ b/board/it8380dev/board.h
@@ -15,11 +15,12 @@
 #undef CONFIG_IT83XX_KEYBOARD_KSI_WUC_INT
 #define CONFIG_IT83XX_PECI_WITH_INTERRUPT
 #define CONFIG_IT83XX_SMCLK2_ON_GPC7
-#undef CONFIG_IT83XX_SPI_USE_CS1
 #define CONFIG_KEYBOARD_BOARD_CONFIG
 #define CONFIG_KEYBOARD_PROTOCOL_8042
 #define CONFIG_PECI_TJMAX 100
 #define CONFIG_POWER_BUTTON
+/* Use CS0 of SSPI */
+#define CONFIG_SPI_FLASH_PORT 0
 
 /* Debug */
 #undef CONFIG_KEYBOARD_DEBUG
diff --git a/board/it8380dev/gpio.inc b/board/it8380dev/gpio.inc
index 61ab6dd45a..4f4f227b7d 100644
--- a/board/it8380dev/gpio.inc
+++ b/board/it8380dev/gpio.inc
@@ -51,11 +51,8 @@ UNIMPLEMENTED(ENTERING_RW)
 ALTERNATE(PIN_MASK(B, 0x03), 1, MODULE_UART, GPIO_PULL_UP) /* UART0 */
 ALTERNATE(PIN_MASK(A, 0x40), 3, MODULE_SPI, 0)             /* SSCK of SPI */
 ALTERNATE(PIN_MASK(C, 0x28), 3, MODULE_SPI, 0)             /* SMOSI/SMISO of SPI */
-#ifdef CONFIG_IT83XX_SPI_USE_CS1
 ALTERNATE(PIN_MASK(G, 0x01), 3, MODULE_SPI, 0)             /* SSCE1# of SPI */
-#else
 ALTERNATE(PIN_MASK(G, 0x04), 3, MODULE_SPI, 0)             /* SSCE0# of SPI */
-#endif
 ALTERNATE(PIN_MASK(A, 0x80), 1, MODULE_PWM_FAN, 0)         /* PWM7 for FAN1 */
 ALTERNATE(PIN_MASK(D, 0x40), 3, MODULE_PWM_FAN, 0)         /* TACH0A for FAN1 */
 ALTERNATE(PIN_MASK(B, 0x18), 1, MODULE_I2C, 0)             /* I2C A SCL/SDA */
diff --git a/chip/it83xx/spi.c b/chip/it83xx/spi.c
index 83eff6efe7..df7158b701 100644
--- a/chip/it83xx/spi.c
+++ b/chip/it83xx/spi.c
@@ -30,6 +30,11 @@ enum sspi_clk_sel {
 	sspi_clk_3mhz,
 };
 
+enum sspi_ch_sel {
+	SSPI_CH_CS0 = 0,
+	SSPI_CH_CS1,
+};
+
 static void sspi_frequency(enum sspi_clk_sel freq)
 {
 	/* SSPI clock frequency select 48MHz (clk_sspi) */
@@ -83,14 +88,18 @@ int spi_enable(int port, int enable)
 		 * 01b: SSCK/SMOSI/SMISO/SSCE0# are enabled.
 		 * 11b: SSCK/SMOSI/SMISO/SSCE1#/SSCE0# are enabled.
 		 */
-#ifdef CONFIG_IT83XX_SPI_USE_CS1
-		IT83XX_GPIO_GRC1 |= 0x20;
-#else
-		IT83XX_GPIO_GRC1 |= 0x10;
-#endif
+		if (port == SSPI_CH_CS1)
+			IT83XX_GPIO_GRC1 |= 0x20;
+		else
+			IT83XX_GPIO_GRC1 |= 0x10;
+
 		gpio_config_module(MODULE_SPI, 1);
 	} else {
-		IT83XX_GPIO_GRC1 &= ~0x30;
+		if (port == SSPI_CH_CS1)
+			IT83XX_GPIO_GRC1 &= ~0x20;
+		else
+			IT83XX_GPIO_GRC1 &= ~0x10;
+
 		gpio_config_module(MODULE_SPI, 0);
 	}
 
@@ -102,30 +111,29 @@ int spi_transaction(const struct spi_device_t *spi_device,
 		uint8_t *rxdata, int rxlen)
 {
 	int idx;
+	uint8_t port = spi_device->port;
 
 	/* bit[0]: Write cycle */
 	IT83XX_SSPI_SPICTRL2 &= ~0x04;
 	for (idx = 0x00; idx < txlen; idx++) {
 		IT83XX_SSPI_SPIDATA = txdata[idx];
-#ifdef CONFIG_IT83XX_SPI_USE_CS1
-		/* Write 1 to start the data transmission of CS1 */
-		IT83XX_SSPI_SPISTS |= 0x08;
-#else
-		/* Write 1 to start the data transmission of CS0 */
-		IT83XX_SSPI_SPISTS |= 0x10;
-#endif
+		if (port == SSPI_CH_CS1)
+			/* Write 1 to start the data transmission of CS1 */
+			IT83XX_SSPI_SPISTS |= 0x08;
+		else
+			/* Write 1 to start the data transmission of CS0 */
+			IT83XX_SSPI_SPISTS |= 0x10;
 	}
 
 	/* bit[1]: Read cycle */
 	IT83XX_SSPI_SPICTRL2 |= 0x04;
 	for (idx = 0x00; idx < rxlen; idx++) {
-#ifdef CONFIG_IT83XX_SPI_USE_CS1
-		/* Write 1 to start the data transmission of CS1 */
-		IT83XX_SSPI_SPISTS |= 0x08;
-#else
-		/* Write 1 to start the data transmission of CS0 */
-		IT83XX_SSPI_SPISTS |= 0x10;
-#endif
+		if (port == SSPI_CH_CS1)
+			/* Write 1 to start the data transmission of CS1 */
+			IT83XX_SSPI_SPISTS |= 0x08;
+		else
+			/* Write 1 to start the data transmission of CS0 */
+			IT83XX_SSPI_SPISTS |= 0x10;
 		rxdata[idx] = IT83XX_SSPI_SPIDATA;
 	}
 
@@ -136,6 +144,8 @@ int spi_transaction(const struct spi_device_t *spi_device,
 
 static void sspi_init(void)
 {
+	int i;
+
 	sspi_frequency(sspi_clk_8mhz);
 
 	/*
@@ -153,7 +163,8 @@ static void sspi_init(void)
 	 */
 	IT83XX_SSPI_SPICTRL2 |= 0x02;
 
-	/* Disabling spi module */
-	spi_enable(NULL, 0);
+	for (i = 0; i < spi_devices_used; i++)
+		/* Disabling spi module */
+		spi_enable(spi_devices[i].port, 0);
 }
 DECLARE_HOOK(HOOK_INIT, sspi_init, HOOK_PRIO_DEFAULT);
diff --git a/include/config.h b/include/config.h
index a732d2af5c..d7efc38e05 100644
--- a/include/config.h
+++ b/include/config.h
@@ -988,9 +988,6 @@
 /* To define it, if I2C channel C and PECI used at the same time. */
 #undef CONFIG_IT83XX_SMCLK2_ON_GPC7
 
-/* Use SSPI Chip Enable 1. */
-#undef CONFIG_IT83XX_SPI_USE_CS1
-
 /*****************************************************************************/
 /* Keyboard config */