diff options
author | Aaron Durbin <adurbin@chromium.org> | 2015-08-31 12:23:42 -0500 |
---|---|---|
committer | chrome-bot <chrome-bot@chromium.org> | 2015-08-31 13:52:25 -0700 |
commit | 1a3c77641050b6755472dd6d5292df2ffc92f589 (patch) | |
tree | ab98af3ed1db1cbe9209a59c83c6c8613412dbf7 | |
parent | c3b5b1739b7ef19d5ceea7a4f9ea64ff7cf4ea1a (diff) | |
download | chrome-ec-1a3c77641050b6755472dd6d5292df2ffc92f589.tar.gz |
glados: document behavior of SLP_S0_L
Note the current behavior and mitigation with the current
design regarding SLP_S0_L.
BUG=chrome-os-partner:44098
BRANCH=None
TEST=Built.
Change-Id: I784dda5e442496c48a5b74614996ff19285e2812
Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/295248
Commit-Ready: Shawn N <shawnn@chromium.org>
Tested-by: Shawn N <shawnn@chromium.org>
Reviewed-by: Shawn N <shawnn@chromium.org>
-rw-r--r-- | board/glados/gpio.inc | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/board/glados/gpio.inc b/board/glados/gpio.inc index 22b225ef9f..dfc1228677 100644 --- a/board/glados/gpio.inc +++ b/board/glados/gpio.inc @@ -14,6 +14,12 @@ GPIO_INT(POWER_BUTTON_L, PIN(35), GPIO_INT_BOTH, power_button_interrupt) GPIO_INT(RSMRST_L_PGOOD, PIN(63), GPIO_INT_BOTH, power_signal_interrupt) GPIO_INT(PCH_SLP_S4_L, PIN(200), GPIO_INT_BOTH, power_signal_interrupt) GPIO_INT(PCH_SLP_S3_L, PIN(206), GPIO_INT_BOTH, power_signal_interrupt) +/* + * This pulldown should be removed in future hardware followers. The signal + * is pulled up in the SoC when the primary rails are on and/or ramping. + * In order to not get interrupt storms there should be external logic + * which makes this a true binary signal into the EC. + */ GPIO_INT(PCH_SLP_S0_L, PIN(211), GPIO_INT_BOTH | GPIO_PULL_DOWN, power_signal_interrupt) GPIO_INT(PCH_SLP_SUS_L, PIN(12), GPIO_INT_BOTH, power_signal_interrupt) GPIO_INT(VOLUME_UP_L, PIN(31), GPIO_INT_FALLING | GPIO_PULL_UP, button_interrupt) |