common: add command spixfer

Similar to i2c_xfer: allow access to a SPI device registers.
We assume the protocol use is set MSB bit to the offset for read
operation.
id is the index of the device in spi_devices.

BRANCH=smaug
TEST=Read/Write SPI registers.
BUG=none

Change-Id: Id4aaffbb6f514fd47086aee240b556ea23298d33
Signed-off-by: Gwendal Grignou <gwendal@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/289857
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>

4 files changed, 68 insertions, 0 deletions

diff --git a/board/ryu/board.h b/board/ryu/board.h
index db06bf1e1a..071f99bda3 100644
--- a/board/ryu/board.h
+++ b/board/ryu/board.h
@@ -175,6 +175,7 @@
 #define CONFIG_ACCEL_INTERRUPTS
 #define CONFIG_CMD_ACCELS
 #define CONFIG_CMD_ACCEL_INFO
+#define CONFIG_CMD_SPI_XFER
 
 /* Size of FIFO queue is determined by Android Hifi sensor requirements:
  * Wake up sensors: Accel @50Hz + Barometer @5Hz + uncal mag @ 10Hz
diff --git a/common/build.mk b/common/build.mk
index b7d5a2f368..cf2e1403a2 100644
--- a/common/build.mk
+++ b/common/build.mk
@@ -71,6 +71,7 @@ common-$(CONFIG_SHA1)+=sha1.o
 common-$(CONFIG_SHA256)+=sha256.o
 common-$(CONFIG_SMBUS)+= smbus.o
 common-$(CONFIG_SOFTWARE_CLZ)+=clz.o
+common-$(CONFIG_CMD_SPI_XFER)+=spi_commands.o
 common-$(CONFIG_SPI_FLASH)+=spi_flash.o spi_flash_reg.o
 common-$(CONFIG_SWITCH)+=switch.o
 common-$(CONFIG_SW_CRC)+=crc.o
diff --git a/common/spi_commands.c b/common/spi_commands.c
new file mode 100644
index 0000000000..7935bab216
--- /dev/null
+++ b/common/spi_commands.c
@@ -0,0 +1,65 @@
+/*
+ * Copyright 2015 The Chromium OS Authors. All rights reserved.
+ * Use of this source code is governed by a BSD-style license that can be
+ * found in the LICENSE file.
+ *
+ * SPI transfer command for debugging SPI devices.
+ */
+
+#include "common.h"
+#include "console.h"
+#include "spi.h"
+#include "util.h"
+
+static int command_spixfer(int argc, char **argv)
+{
+	int dev_id;
+	uint8_t offset;
+	int v = 0;
+	uint8_t data[32];
+	char *e;
+	int rv = 0;
+
+	if (argc != 5)
+		return EC_ERROR_PARAM_COUNT;
+
+	dev_id = strtoi(argv[2], &e, 0);
+	if (*e)
+		return EC_ERROR_PARAM2;
+
+	offset = strtoi(argv[3], &e, 0);
+	if (*e)
+		return EC_ERROR_PARAM3;
+
+	v = strtoi(argv[4], &e, 0);
+	if (*e)
+		return EC_ERROR_PARAM4;
+
+	if (strcasecmp(argv[1], "rlen") == 0) {
+		uint8_t cmd = 0x80 | offset;
+
+		/* Arbitrary length read; param4 = len */
+		if (v < 0 || v > sizeof(data))
+			return EC_ERROR_PARAM4;
+
+		rv = spi_transaction(&spi_devices[dev_id], &cmd, 1, data, v);
+
+		if (!rv)
+			ccprintf("Data: %.*h\n", v, data);
+
+	} else if (strcasecmp(argv[1], "w") == 0) {
+		/* 8-bit write */
+		uint8_t cmd[2] = { offset, v };
+
+		rv = spi_transaction(&spi_devices[dev_id], cmd, 2, NULL, 0);
+	} else {
+		return EC_ERROR_PARAM1;
+	}
+
+	return rv;
+}
+DECLARE_CONSOLE_COMMAND(spixfer, command_spixfer,
+			"rlen/w id offset [value | len]",
+			"Read write spi. id is spi_devices array index",
+			NULL);
+
diff --git a/include/config.h b/include/config.h
index 4685f60465..5e3a78e345 100644
--- a/include/config.h
+++ b/include/config.h
@@ -501,6 +501,7 @@
 #define CONFIG_CMD_SHMEM
 #undef CONFIG_CMD_SLEEP
 #undef CONFIG_CMD_SPI_FLASH
+#undef CONFIG_CMD_SPI_XFER
 #undef CONFIG_CMD_STACKOVERFLOW
 #undef CONFIG_CMD_TASKREADY
 #define CONFIG_CMD_TEMP_SENSOR