nuc: Fixed wheatley bugs of SERIRQ and AC detection.

SERIRQ bug:
PMC1/2 share the same IRQ number 1 with default setting. Enable it will
influence 8042 protocols since KBC has no data but IRQ 1 is issued by
PMC.

AC detection bug:
GPIO definitions between AC_PRESENT and ACOK mismatched. AC_PRESENT will
always
be high even we don't plug the adaptor.

Modified drivers:
1. lpc.c: Remove enabling SERIRQ for PMC1/2 and disable IRQ12 for Mouse.
2. config_flash_layout.h: Modified for adjusting RAM size.
3. gpio.inc: Modified GPIO definitions for AC issue
4. board.h: Modified for adjusting RAM size and add support for ACC
5. board.c: Add support for ACC and adjust ADC max value

BUG=chrome-os-partner:34346
TEST=make buildall -j; test nuvoton IC specific drivers
BRANCH=none

Change-Id: Ib330ef4078e4b06f1c01a2a6316e468b43d7a8d9
Signed-off-by: Mulin Chao <mlchao@nuvoton.com>
Reviewed-on: https://chromium-review.googlesource.com/311933
Reviewed-by: Randall Spangler <rspangler@chromium.org>

7 files changed, 197 insertions, 35 deletions

diff --git a/board/wheatley/board.c b/board/wheatley/board.c
index c4561d7347..e63ac3b89e 100644
--- a/board/wheatley/board.c
+++ b/board/wheatley/board.c
@@ -15,6 +15,9 @@
 #include "chipset.h"
 #include "console.h"
 #include "driver/als_opt3001.h"
+#include "driver/accel_kionix.h"
+#include "driver/accel_kx022.h"
+#include "driver/accelgyro_bmi160.h"
 #include "extpower.h"
 #include "gpio.h"
 #include "hooks.h"
@@ -22,10 +25,13 @@
 #include "i2c.h"
 #include "keyboard_scan.h"
 #include "lid_switch.h"
+#include "math_util.h"
 #include "motion_sense.h"
+#include "motion_lid.h"
 #include "pi3usb9281.h"
 #include "power.h"
 #include "power_button.h"
+#include "spi.h"
 #include "switch.h"
 #include "system.h"
 #include "task.h"
@@ -106,7 +112,7 @@ BUILD_ASSERT(ARRAY_SIZE(power_signal_list) == POWER_SIGNAL_COUNT);
 /* ADC channels */
 const struct adc_t adc_channels[] = {
 	/* Vbus sensing. Converted to mV, full ADC is equivalent to 33V. */
-	[ADC_VBUS] = {"VBUS", NPCX_ADC_CH1, ADC_MAX_VOLT, ADC_READ_MAX+1, 0},
+	[ADC_VBUS] = {"VBUS", NPCX_ADC_CH1, 33000, ADC_READ_MAX+1, 0},
 	/* Adapter current output or battery discharging current */
 	[ADC_AMON_BMON] = {"AMON_BMON", NPCX_ADC_CH4, 55000, 6144, 0},
 	/* System current consumption */
@@ -117,7 +123,7 @@ BUILD_ASSERT(ARRAY_SIZE(adc_channels) == ADC_CH_COUNT);
 const struct i2c_port_t i2c_ports[]  = {
 	{"pmic",    NPCX_I2C_PORT0_0, 400, GPIO_I2C0_0_SCL, GPIO_I2C0_0_SDA},
 	{"muxes",   NPCX_I2C_PORT0_1, 400, GPIO_I2C0_1_SCL, GPIO_I2C0_1_SDA},
-	{"pd_mcu",  NPCX_I2C_PORT1,  1000, GPIO_I2C1_SCL,   GPIO_I2C1_SDA},
+	{"pd_mcu",  NPCX_I2C_PORT1,   400, GPIO_I2C1_SCL,   GPIO_I2C1_SDA},
 	{"sensors", NPCX_I2C_PORT2,   400, GPIO_I2C2_SCL,   GPIO_I2C2_SDA},
 	{"batt",    NPCX_I2C_PORT3,   100, GPIO_I2C3_SCL,   GPIO_I2C3_SDA},
 };
@@ -206,8 +212,10 @@ struct als_t als[] = {
 BUILD_ASSERT(ARRAY_SIZE(als) == ALS_COUNT);
 
 const struct button_config buttons[CONFIG_BUTTON_COUNT] = {
-	{ 0 },
-	{ 0 },
+	{"Volume Down", KEYBOARD_BUTTON_VOLUME_DOWN, GPIO_VOLUME_DOWN_L,
+	 30 * MSEC, 0},
+	{"Volume Up", KEYBOARD_BUTTON_VOLUME_UP, GPIO_VOLUME_UP_L,
+	 30 * MSEC, 0},
 };
 
 static void board_pmic_init(void)
@@ -327,6 +335,8 @@ DECLARE_DEFERRED(enable_input_devices);
 /* Called on AP S5 -> S3 transition */
 static void board_chipset_startup(void)
 {
+	gpio_set_level(GPIO_USB1_ENABLE, 1);
+	gpio_set_level(GPIO_USB2_ENABLE, 1);
 	hook_call_deferred(enable_input_devices, 0);
 }
 DECLARE_HOOK(HOOK_CHIPSET_STARTUP, board_chipset_startup, HOOK_PRIO_DEFAULT);
@@ -334,6 +344,8 @@ DECLARE_HOOK(HOOK_CHIPSET_STARTUP, board_chipset_startup, HOOK_PRIO_DEFAULT);
 /* Called on AP S3 -> S5 transition */
 static void board_chipset_shutdown(void)
 {
+	gpio_set_level(GPIO_USB1_ENABLE, 0);
+	gpio_set_level(GPIO_USB2_ENABLE, 0);
 	hook_call_deferred(enable_input_devices, 0);
 }
 DECLARE_HOOK(HOOK_CHIPSET_SHUTDOWN, board_chipset_shutdown, HOOK_PRIO_DEFAULT);
@@ -367,18 +379,23 @@ static void board_chipset_suspend(void)
 }
 DECLARE_HOOK(HOOK_CHIPSET_SUSPEND, board_chipset_suspend, HOOK_PRIO_DEFAULT);
 
-/* Turn off LEDs in hibernate */
 uint32_t board_get_gpio_hibernate_state(uint32_t port, uint32_t pin)
 {
 	int i;
-	const uint32_t led_gpios[][2] = {
+	const uint32_t out_low_gpios[][2] = {
+		/* Turn off LEDs in hibernate */
 		GPIO_TO_PORT_MASK_PAIR(GPIO_CHARGE_LED_1),
 		GPIO_TO_PORT_MASK_PAIR(GPIO_CHARGE_LED_2),
+		/*
+		 * Set PD wake low so that it toggles high to generate a wake
+		 * event once we leave hibernate.
+		 */
+		GPIO_TO_PORT_MASK_PAIR(GPIO_USB_PD_WAKE),
 	};
 
 	/* LED GPIOs should be driven low to turn off LEDs */
-	for (i = 0; i < ARRAY_SIZE(led_gpios); ++i)
-		if (led_gpios[i][0] == port && led_gpios[i][1] == pin)
+	for (i = 0; i < ARRAY_SIZE(out_low_gpios); ++i)
+		if (out_low_gpios[i][0] == port && out_low_gpios[i][1] == pin)
 			return GPIO_OUTPUT | GPIO_LOW;
 
 	/* Other GPIOs should be put in a low-power state */
@@ -415,3 +432,127 @@ static void board_handle_reboot(void)
 	gpio_set_flags_by_mask(g->port, g->mask, GPIO_OUT_HIGH);
 }
 DECLARE_HOOK(HOOK_INIT, board_handle_reboot, HOOK_PRIO_FIRST);
+
+#ifdef HAS_TASK_MOTIONSENSE
+/* Motion sensors */
+/* Mutexes */
+static struct mutex g_lid_mutex;
+static struct mutex g_base_mutex;
+
+/* KX022 private data */
+struct kionix_accel_data g_kx022_data = {
+	.variant = KX022,
+};
+
+struct motion_sensor_t motion_sensors[] = {
+	/*
+	 * Note: bmi160: supports accelerometer and gyro sensor
+	 * Requirement: accelerometer sensor must init before gyro sensor
+	 * DO NOT change the order of the following table.
+	 */
+	{.name = "Base Accel",
+	 .active_mask = SENSOR_ACTIVE_S0,
+	 .chip = MOTIONSENSE_CHIP_BMI160,
+	 .type = MOTIONSENSE_TYPE_ACCEL,
+	 .location = MOTIONSENSE_LOC_BASE,
+	 .drv = &bmi160_drv,
+	 .mutex = &g_base_mutex,
+	 .drv_data = &g_bmi160_data,
+	 .addr = BMI160_ADDR0,
+	 .rot_standard_ref = NULL, /* Identity matrix. */
+	 .default_range = 2,  /* g, enough for laptop. */
+	 .config = {
+		 /* AP: by default use EC settings */
+		 [SENSOR_CONFIG_AP] = {
+			 .odr = 0,
+			 .ec_rate = 0,
+		 },
+		 /* EC use accel for angle detection */
+		 [SENSOR_CONFIG_EC_S0] = {
+			 .odr = 10000 | ROUND_UP_FLAG,
+			 .ec_rate = 100,
+		 },
+		 /* Sensor off in S3/S5 */
+		 [SENSOR_CONFIG_EC_S3] = {
+			 .odr = 0,
+			 .ec_rate = 0
+		 },
+		 /* Sensor off in S3/S5 */
+		 [SENSOR_CONFIG_EC_S5] = {
+			 .odr = 0,
+			 .ec_rate = 0
+		 },
+	 },
+	},
+
+	{.name = "Base Gyro",
+	 .active_mask = SENSOR_ACTIVE_S0,
+	 .chip = MOTIONSENSE_CHIP_BMI160,
+	 .type = MOTIONSENSE_TYPE_GYRO,
+	 .location = MOTIONSENSE_LOC_BASE,
+	 .drv = &bmi160_drv,
+	 .mutex = &g_base_mutex,
+	 .drv_data = &g_bmi160_data,
+	 .addr = BMI160_ADDR0,
+	 .default_range = 1000, /* dps */
+	 .rot_standard_ref = NULL, /* Identity Matrix. */
+	 .config = {
+		 /* AP: by default shutdown all sensors */
+		 [SENSOR_CONFIG_AP] = {
+			 .odr = 0,
+			 .ec_rate = 0,
+		 },
+		 /* EC does not need in S0 */
+		 [SENSOR_CONFIG_EC_S0] = {
+			 .odr = 0,
+			 .ec_rate = 0,
+		 },
+		 /* Sensor off in S3/S5 */
+		 [SENSOR_CONFIG_EC_S3] = {
+			 .odr = 0,
+			 .ec_rate = 0,
+		 },
+		 /* Sensor off in S3/S5 */
+		 [SENSOR_CONFIG_EC_S5] = {
+			 .odr = 0,
+			 .ec_rate = 0,
+		 },
+	 },
+	},
+
+	{.name = "Lid Accel",
+	 .active_mask = SENSOR_ACTIVE_S0,
+	 .chip = MOTIONSENSE_CHIP_KX022,
+	 .type = MOTIONSENSE_TYPE_ACCEL,
+	 .location = MOTIONSENSE_LOC_LID,
+	 .drv = &kionix_accel_drv,
+	 .mutex = &g_lid_mutex,
+	 .drv_data = &g_kx022_data,
+	 .addr = KX022_ADDR1,
+	 .rot_standard_ref = NULL, /* Identity matrix. */
+	 .default_range = 2, /* g, enough for laptop. */
+	 .config = {
+		/* AP: by default use EC settings */
+		[SENSOR_CONFIG_AP] = {
+			.odr = 10000 | ROUND_UP_FLAG,
+			.ec_rate = 100,
+		},
+		/* EC use accel for angle detection */
+		[SENSOR_CONFIG_EC_S0] = {
+			.odr = 10000 | ROUND_UP_FLAG,
+			.ec_rate = 100,
+		},
+		/* unused */
+		[SENSOR_CONFIG_EC_S3] = {
+			.odr = 0,
+			.ec_rate = 0,
+		},
+		[SENSOR_CONFIG_EC_S5] = {
+			.odr = 0,
+			.ec_rate = 0,
+		},
+	 },
+	},
+};
+const unsigned int motion_sensor_count = ARRAY_SIZE(motion_sensors);
+#endif /* defined(HAS_TASK_MOTIONSENSE) */
diff --git a/board/wheatley/board.h b/board/wheatley/board.h
index a1ba38d190..801d3c1b5b 100644
--- a/board/wheatley/board.h
+++ b/board/wheatley/board.h
@@ -9,6 +9,8 @@
 #define __CROS_EC_BOARD_H
 
 /* Optional features */
+#define CONFIG_ACCELGYRO_BMI160
+#define CONFIG_ACCEL_KX022
 #define CONFIG_ADC
 #define CONFIG_ALS
 #define CONFIG_ALS_OPT3001
@@ -37,17 +39,32 @@
 #define CONFIG_CLOCK_CRYSTAL
 #define CONFIG_EXTPOWER_GPIO
 #define CONFIG_HOSTCMD_PD
+#define CONFIG_HOSTCMD_PD_PANIC
 #define CONFIG_I2C
 #define CONFIG_I2C_MASTER
 #define CONFIG_LPC
 #define CONFIG_UART_HOST                0
 #define CONFIG_KEYBOARD_PROTOCOL_8042
 #define CONFIG_LED_COMMON
+#define CONFIG_LID_ANGLE
+#define CONFIG_LID_ANGLE_SENSOR_BASE 0
+#define CONFIG_LID_ANGLE_SENSOR_LID 2
 #define CONFIG_LID_SWITCH
 #define CONFIG_POWER_BUTTON
 #define CONFIG_POWER_BUTTON_X86
 #define CONFIG_POWER_COMMON
+/* All data won't fit in data RAM.  So, moving boundary slightly. */
+#define RAM_SHIFT_SIZE   (4 * 1024)
+#undef CONFIG_RO_SIZE
+#define CONFIG_RO_SIZE   (96 * 1024 + RAM_SHIFT_SIZE)
+#undef CONFIG_RAM_BASE
+#define CONFIG_RAM_BASE  (0x200C0000 + RAM_SHIFT_SIZE)
+#undef CONFIG_RAM_SIZE
+#define CONFIG_RAM_SIZE  (0x00008000 - 0x800 - RAM_SHIFT_SIZE)
 #define CONFIG_SCI_GPIO GPIO_PCH_SCI_L
+/* We're space constrained on GLaDOS, so reduce the UART TX buffer size. */
+#undef CONFIG_UART_TX_BUF_SIZE
+#define CONFIG_UART_TX_BUF_SIZE 512
 #define CONFIG_USB_CHARGER
 #define CONFIG_USB_MUX_PI3USB30532
 #define CONFIG_USB_MUX_PS8740
@@ -56,6 +73,8 @@
 #define CONFIG_USB_PD_ALT_MODE_DFP
 #define CONFIG_USB_PD_CUSTOM_VDM
 #define CONFIG_USB_PD_DUAL_ROLE
+#define CONFIG_USB_PD_LOGGING
+#define CONFIG_USB_PD_LOG_SIZE 512
 #define CONFIG_USB_PD_PORT_COUNT 2
 #define CONFIG_USB_PD_TCPM_TCPCI
 #define CONFIG_USB_PD_TRY_SRC
@@ -64,10 +83,11 @@
 #define CONFIG_USBC_SS_MUX
 #define CONFIG_USBC_SS_MUX_DFP_ONLY
 #define CONFIG_USBC_VCONN
+#define CONFIG_USBC_VCONN_SWAP
 #define CONFIG_VBOOT_HASH
 
 #define CONFIG_FLASH_SIZE 0x40000 /* 256 KB Flash used for EC */
-#define CONFIG_SPI_FLASH_W25Q64
+#define CONFIG_SPI_FLASH_W25X40
 
 #define CONFIG_TEMP_SENSOR
 #define CONFIG_TEMP_SENSOR_BD99992GW
@@ -100,10 +120,9 @@
 
 /* I2C ports */
 #define I2C_PORT_PMIC                   NPCX_I2C_PORT0_0
-/* TODO(shawnn): Verify that the charge detectors aren't swapped */
-#define I2C_PORT_USB_CHARGER_1          NPCX_I2C_PORT0_0
+#define I2C_PORT_USB_CHARGER_1          NPCX_I2C_PORT0_1
 #define I2C_PORT_USB_MUX                NPCX_I2C_PORT0_1
-#define I2C_PORT_USB_CHARGER_2          NPCX_I2C_PORT0_1
+#define I2C_PORT_USB_CHARGER_2          NPCX_I2C_PORT0_0
 #define I2C_PORT_PD_MCU                 NPCX_I2C_PORT1
 #define I2C_PORT_TCPC                   NPCX_I2C_PORT1
 #define I2C_PORT_ALS                    NPCX_I2C_PORT2
@@ -126,7 +145,6 @@
 #undef CONFIG_CMD_TIMERINFO
 #undef CONFIG_CONSOLE_CMDHELP
 #undef CONFIG_CONSOLE_HISTORY
-#undef CONFIG_TASK_PROFILING
 
 #undef DEFERRABLE_MAX_COUNT
 #define DEFERRABLE_MAX_COUNT 14
@@ -188,9 +206,12 @@ enum als_id {
 #define PD_POWER_SUPPLY_TURN_ON_DELAY  30000  /* us */
 #define PD_POWER_SUPPLY_TURN_OFF_DELAY 250000 /* us */
 
+/* delay to turn on/off vconn */
+#define PD_VCONN_SWAP_DELAY 5000 /* us */
+
 /* Define typical operating power and max power */
 #define PD_OPERATING_POWER_MW 15000
-#define PD_MAX_POWER_MW       60000
+#define PD_MAX_POWER_MW       45000
 #define PD_MAX_CURRENT_MA     3000
 
 /* Try to negotiate to 20V since i2c noise problems should be fixed. */
diff --git a/board/wheatley/gpio.inc b/board/wheatley/gpio.inc
index fd9ab56e95..ad736c1801 100644
--- a/board/wheatley/gpio.inc
+++ b/board/wheatley/gpio.inc
@@ -6,7 +6,7 @@
  */
 
 GPIO_INT(LID_OPEN,           PIN(9,  5), GPIO_INT_BOTH | GPIO_PULL_UP,    lid_interrupt)           /* A47 - SPIP_MISO for LID_OPEN_EC */
-GPIO_INT(AC_PRESENT,         PIN(7,  3), GPIO_INT_BOTH,                   extpower_interrupt)      /* B39 - PS2_CLK3/TA2 for EC_PCH_ACPRESENT */
+GPIO_INT(AC_PRESENT,         PIN(B,  0), GPIO_INT_BOTH,                   extpower_interrupt)      /* B57 - GPIOB0 for EC_PCH_ACPRESENT */
 GPIO_INT(WP_L,               PIN(7,  1), GPIO_INT_BOTH,                   switch_interrupt)        /* B38 - PS2_DAT3/TB2 for EC_WP_L */
 /* Buffered power button input from PMIC / ROP_EC_PWR_BTN_L_R */
 GPIO_INT(POWER_BUTTON_L,     PIN(9,  7), GPIO_INT_BOTH,                   power_button_interrupt)  /* A48 - GPIO97 for ROP_EC_PWR_BTN_L_R */
@@ -68,7 +68,7 @@ GPIO(PCH_WAKE_L,             PIN(3,  5), GPIO_ODR_HIGH)                   /* A17
 GPIO(EC_FAN1_TTACH,          PIN(9,  3), GPIO_INPUT | GPIO_PULL_UP)       /* A46 - TA1/F_DIO2 for EC_FAN1_TACH */
 /* Fan PWM output - NC / testing only */
 GPIO(EC_FAN1_PWM,            PIN(C,  2), GPIO_OUT_LOW)                    /* A59 - PWM1 for EC_FAN1_PWM */
-GPIO(PCH_ACOK,               PIN(B,  0), GPIO_OUT_LOW)                    /* B57 - GPIOB0 for ROP_EC_ACOK */
+GPIO(PCH_ACOK,               PIN(7,  3), GPIO_OUT_LOW)                    /* B39 - PS2_CLK3/TA2for ROP_EC_ACOK */
 /* Interrupts from accelerometer / gyro -- not yet implemented */
 GPIO(ACCEL1_INT,             PIN(A,  3), GPIO_INPUT)                      /* A50 - SPIP_MOSI for ACCEL1_INT_L */
 GPIO(ACCEL2_INT,             PIN(3,  3), GPIO_INPUT)                      /* B17 - GPIO33 for ACCEL2_INT_L */
diff --git a/board/wheatley/usb_pd_policy.c b/board/wheatley/usb_pd_policy.c
index f62ffae0f5..ff88ede3bc 100644
--- a/board/wheatley/usb_pd_policy.c
+++ b/board/wheatley/usb_pd_policy.c
@@ -21,7 +21,8 @@
 #define CPRINTF(format, args...) cprintf(CC_USBPD, format, ## args)
 #define CPRINTS(format, args...) cprints(CC_USBPD, format, ## args)
 
-#define PDO_FIXED_FLAGS (PDO_FIXED_DUAL_ROLE | PDO_FIXED_DATA_SWAP)
+#define PDO_FIXED_FLAGS (PDO_FIXED_DUAL_ROLE | PDO_FIXED_DATA_SWAP |\
+			 PDO_FIXED_COMM_CAP)
 
 /* TODO: fill in correct source and sink capabilities */
 const uint32_t pd_src_pdo[] = {
@@ -120,6 +121,12 @@ int pd_check_data_swap(int port, int data_role)
 	return (data_role == PD_ROLE_UFP) ? 1 : 0;
 }
 
+int pd_check_vconn_swap(int port)
+{
+	/* in G3, do not allow vconn swap since pp5000_A rail is off */
+	return gpio_get_level(GPIO_PMIC_SLP_SUS_L);
+}
+
 void pd_execute_data_swap(int port, int data_role)
 {
 	/* Do nothing */
diff --git a/chip/npcx/config_flash_layout.h b/chip/npcx/config_flash_layout.h
index b1fb2f7b2e..0aeed1d417 100644
--- a/chip/npcx/config_flash_layout.h
+++ b/chip/npcx/config_flash_layout.h
@@ -35,11 +35,11 @@
 
 /* RO firmware offset in flash */
 #define CONFIG_RO_MEM_OFF	0
-#define CONFIG_RO_SIZE		(96 * 1024)   /* 96KB for RO FW */
+#define CONFIG_RO_SIZE		(96 * 1024)      /* 96KB for RO FW */
 
 /* RW firmware offset in flash */
 #define CONFIG_RW_MEM_OFF	CONFIG_RW_STORAGE_OFF
-#define CONFIG_RW_SIZE		(96 * 1024)   /* 96KB for RW FW */
+#define CONFIG_RW_SIZE		CONFIG_RO_SIZE   /* 96KB for RW FW */
 
 /* The storage offset of ec.R*.flat which is used for firmware_image.lds */
 #define CONFIG_RO_STORAGE_OFF	CONFIG_RO_HDR_SIZE
diff --git a/chip/npcx/lpc.c b/chip/npcx/lpc.c
index e135fabaa6..3d193abe73 100644
--- a/chip/npcx/lpc.c
+++ b/chip/npcx/lpc.c
@@ -245,7 +245,7 @@ void lpc_keyboard_put_char(uint8_t chr, int send_irq)
 	CPRINTS("KB put %02x", chr);
 
 	/* Enable OBE interrupt to detect host read data out */
-	SET_BIT(NPCX_HICTRL, NPCX_HICTRL_OBFCIE);
+	SET_BIT(NPCX_HICTRL, NPCX_HICTRL_OBECIE);
 	task_enable_irq(NPCX_IRQ_KBC_OBE);
 	if (send_irq) {
 		keyboard_irq_assert();
@@ -518,7 +518,7 @@ DECLARE_IRQ(NPCX_IRQ_KBC_IBF, lpc_kbc_ibf_interrupt, 2);
 void lpc_kbc_obe_interrupt(void)
 {
 	/* Disable KBC OBE interrupt */
-	CLEAR_BIT(NPCX_HICTRL, NPCX_HICTRL_OBFCIE);
+	CLEAR_BIT(NPCX_HICTRL, NPCX_HICTRL_OBECIE);
 	task_disable_irq(NPCX_IRQ_KBC_OBE);
 
 	CPRINTS("obe isr %02x", NPCX_HIKMST);
@@ -687,8 +687,6 @@ void lpc_host_register_init(void)
 	lpc_sib_write_reg(SIO_OFFSET, 0x30, 0x01);
 
 	/* enable KBC*/
-	lpc_sib_write_reg(SIO_OFFSET, 0x07, 0x05);
-	lpc_sib_write_reg(SIO_OFFSET, 0x30, 0x01);
 	lpc_sib_write_reg(SIO_OFFSET, 0x07, 0x06);
 	lpc_sib_write_reg(SIO_OFFSET, 0x30, 0x01);
 
@@ -738,12 +736,11 @@ void lpc_lreset_pltrst_handler(void)
 	SET_BIT(NPCX_WKPCL(MIWU_TABLE_0 , MIWU_GROUP_5), 7);
 
 	/*
-	 * Once LRESET is de-asserted (low -> high),
-	 * we need to intialize lpc settings again.
-	 * But if RSTCTL_LRESET_PLTRST_MODE is active, we needn't to do it again
+	 * Once LRESET is de-asserted (low -> high), we need to intialize lpc
+	 * settings once. If RSTCTL_LRESET_PLTRST_MODE is active, LPC registers
+	 * won't be reset by Host domain reset but Core domain does.
 	 */
-	if(!IS_BIT_SET(NPCX_RSTCTL, NPCX_RSTCTL_LRESET_PLTRST_MODE))
-		lpc_host_register_init();
+	lpc_host_register_init();
 }
 
 int lpc_get_pltrst_asserted(void)
@@ -797,10 +794,7 @@ static void lpc_init(void)
 	/* Turn on PMC2 for Host Command usage */
 	SET_BIT(NPCX_HIPMCTL(PMC_HOST_CMD), 0);
 	SET_BIT(NPCX_HIPMCTL(PMC_HOST_CMD), 1);
-	/* enable PMC2 IRQ */
-	SET_BIT(NPCX_HIPMIE(PMC_HOST_CMD), 0);
-	/* IRQ control from HW */
-	SET_BIT(NPCX_HIPMIE(PMC_HOST_CMD), 3);
+
 	/*
 	 * Set required control value (avoid setting HOSTWAIT bit at this stage)
 	 */
@@ -829,8 +823,7 @@ static void lpc_init(void)
 #if SUPPORT_P80_SEG
 	SET_BIT(NPCX_GLUE_SDP_CTS, 0);
 #endif
-	/* Just turn on IRQE */
-	NPCX_HIPMIE(PMC_ACPI) = 0x01;
+
 	lpc_task_enable_irq();
 
 	/* Initialize host args and memory map to all zero */
diff --git a/chip/npcx/registers.h b/chip/npcx/registers.h
index df0fb9256b..c8ecee36d1 100644
--- a/chip/npcx/registers.h
+++ b/chip/npcx/registers.h
@@ -922,7 +922,7 @@ enum NPCX_PMC_PWDWN_CTL_T {
 /* KBC register field */
 #define NPCX_HICTRL_OBFKIE               0 /* Automatic Serial IRQ1 for KBC */
 #define NPCX_HICTRL_OBFMIE               1 /* Automatic Serial IRQ12 for Mouse*/
-#define NPCX_HICTRL_OBFCIE               2 /* KBC OBE interrupt enable */
+#define NPCX_HICTRL_OBECIE               2 /* KBC OBE interrupt enable */
 #define NPCX_HICTRL_IBFCIE               3 /* KBC IBF interrupt enable */
 #define NPCX_HICTRL_PMIHIE               4 /* Automatic Serial IRQ11 for PMC1 */
 #define NPCX_HICTRL_PMIOCIE              5 /* PMC1 OBE interrupt enable */