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authorDuncan Laurie <dlaurie@chromium.org>2015-12-08 20:50:46 -0800
committerDuncan Laurie <dlaurie@chromium.org>2015-12-09 05:14:14 +0000
commita41d5c84ca5a0b9921d9c63a6c54c1264bb8f1b9 (patch)
tree80a74e32faf2c6a529e3dbecc5750c74eef87ff0
parentf5773e74d536f8c5350c96fcfbe8b8e6ce0009da (diff)
downloadchrome-ec-a41d5c84ca5a0b9921d9c63a6c54c1264bb8f1b9.tar.gz
glados/chell: Do not pull-up RSMRST to PCH in hibernate
If deep sleep S5 is supported RSMRST to the PCH should not be high when the PCH is in S5 unless the board is sequencing out of deep sleep and S5 state. Therefore, ensure RSMRST is low when the EC goes into hibernate. This assumes deep sleep S5 is employed. A more appropriate fix is to honor RMSRST state prior to going into hibernate state. Without this change the behavior on certain platforms do not sequence out of S5 when coming out of hibernate. BUG=chrome-os-partner:48133 BRANCH=none TEST=tested on a failing EVT chell board at the factory Change-Id: Ia4a1cdb59c25a3fc704c64fbe6beb01ede90d777 Signed-off-by: Duncan Laurie <dlaurie@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/317070 Reviewed-by: Aaron Durbin <adurbin@chromium.org>
-rw-r--r--board/chell/board.c2
-rw-r--r--board/glados/board.c2
2 files changed, 4 insertions, 0 deletions
diff --git a/board/chell/board.c b/board/chell/board.c
index c3f7c85c3d..992ef0505b 100644
--- a/board/chell/board.c
+++ b/board/chell/board.c
@@ -367,6 +367,8 @@ uint32_t board_get_gpio_hibernate_state(uint32_t port, uint32_t pin)
GPIO_TO_PORT_MASK_PAIR(GPIO_PCH_RTCRST),
/* Keep keyboard backlight off, GPIO34 pin is in PWM mode */
GPIO_TO_PORT_MASK_PAIR(GPIO_KEYBOARD_BACKLIGHT),
+ /* RSMRST to PCH should be low when rails are off */
+ GPIO_TO_PORT_MASK_PAIR(GPIO_PCH_RSMRST_L),
};
/* Some GPIOs should be driven low in hibernate */
diff --git a/board/glados/board.c b/board/glados/board.c
index 74682a46fe..ff1aada1f3 100644
--- a/board/glados/board.c
+++ b/board/glados/board.c
@@ -433,6 +433,8 @@ uint32_t board_get_gpio_hibernate_state(uint32_t port, uint32_t pin)
GPIO_TO_PORT_MASK_PAIR(GPIO_USB_PD_WAKE),
/* The GPIO to control RTCRST is active high. */
GPIO_TO_PORT_MASK_PAIR(GPIO_PCH_RTCRST),
+ /* RSMRST to PCH should be low when rails are off */
+ GPIO_TO_PORT_MASK_PAIR(GPIO_PCH_RSMRST_L),
};
/* LED GPIOs should be driven low to turn off LEDs */