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authorDino Li <dino.li@ite.com.tw>2015-12-14 17:14:37 +0800
committerchrome-bot <chrome-bot@chromium.org>2015-12-14 20:04:54 -0800
commit57e703ea24bcbaf6773288335110517e7da90da3 (patch)
treeb36ac989291544b93c952fe62b2393b8ff6bad5a
parent313f2ab8c5cf2c1cf52c7316ed8600894b4fc977 (diff)
downloadchrome-ec-57e703ea24bcbaf6773288335110517e7da90da3.tar.gz
it8380dev: Implement GPIO mode for KBS pins and fix gpio_set_level()
1. KSO[0-15] and KSI[0-7] can be used as GPIO input if they are not set for keyboard scan function. 2. Critical section for gpio_set_level(). Signed-off-by: Dino Li <dino.li@ite.com.tw> BRANCH=none BUG=none TEST=console commands: gpioset, gpioget, and version. Change-Id: I8edae122525e6dcebaa3489116642d8e48520569 Reviewed-on: https://chromium-review.googlesource.com/318112 Commit-Ready: Dino Li <dino.li@ite.com.tw> Tested-by: Dino Li <dino.li@ite.com.tw> Reviewed-by: Randall Spangler <rspangler@chromium.org>
-rw-r--r--board/it8380dev/board.h1
-rw-r--r--board/it8380dev/gpio.inc5
-rw-r--r--chip/it83xx/gpio.c24
-rw-r--r--chip/it83xx/registers.h9
4 files changed, 37 insertions, 2 deletions
diff --git a/board/it8380dev/board.h b/board/it8380dev/board.h
index 0a1cc35caf..c9597a8af0 100644
--- a/board/it8380dev/board.h
+++ b/board/it8380dev/board.h
@@ -12,6 +12,7 @@
#define CHIP_FAMILY_IT839X
#define CONFIG_BATTERY_SMART
+#define CONFIG_BOARD_VERSION
#define CONFIG_FANS 1
#define CONFIG_I2C
#define CONFIG_I2C_MASTER
diff --git a/board/it8380dev/gpio.inc b/board/it8380dev/gpio.inc
index e438771a58..84a3bef164 100644
--- a/board/it8380dev/gpio.inc
+++ b/board/it8380dev/gpio.inc
@@ -38,6 +38,11 @@ GPIO(UART2_SIN1, PIN(H, 1), GPIO_INPUT)
GPIO(UART2_SOUT1, PIN(H, 2), GPIO_INPUT)
#endif
+/* KSO/KSI pins can be used as GPIO input. */
+GPIO(BOARD_VERSION1, PIN(KSO_H, 5), GPIO_INPUT)
+GPIO(BOARD_VERSION2, PIN(KSO_H, 6), GPIO_INPUT)
+GPIO(BOARD_VERSION3, PIN(KSO_H, 7), GPIO_INPUT)
+
/* Unimplemented signals which we need to emulate for now */
UNIMPLEMENTED(ENTERING_RW)
diff --git a/chip/it83xx/gpio.c b/chip/it83xx/gpio.c
index ea29ace11c..fa4d0306f4 100644
--- a/chip/it83xx/gpio.c
+++ b/chip/it83xx/gpio.c
@@ -264,12 +264,28 @@ test_mockable int gpio_get_level(enum gpio_signal signal)
void gpio_set_level(enum gpio_signal signal, int value)
{
+ uint32_t int_mask = get_int_mask();
+
+ /* critical section with interrupts off */
+ interrupt_disable();
if (value)
IT83XX_GPIO_DATA(gpio_list[signal].port) |=
gpio_list[signal].mask;
else
IT83XX_GPIO_DATA(gpio_list[signal].port) &=
~gpio_list[signal].mask;
+ /* restore interrupts */
+ set_int_mask(int_mask);
+}
+
+void gpio_kbs_pin_gpio_mode(uint32_t port, uint32_t mask, uint32_t flags)
+{
+ if (port == GPIO_KSO_H)
+ IT83XX_KBS_KSOHGCTRL |= mask;
+ else if (port == GPIO_KSO_L)
+ IT83XX_KBS_KSOLGCTRL |= mask;
+ else if (port == GPIO_KSI)
+ IT83XX_KBS_KSIGCTRL |= mask;
}
void gpio_set_flags_by_mask(uint32_t port, uint32_t mask, uint32_t flags)
@@ -410,8 +426,12 @@ void gpio_pre_init(void)
if (is_warm)
flags &= ~(GPIO_LOW | GPIO_HIGH);
- /* Set up GPIO based on flags */
- gpio_set_flags_by_mask(g->port, g->mask, flags);
+ if (g->port > GPIO_KBS_OFF)
+ /* KSO/KSI pins to GPIO mode (input only). */
+ gpio_kbs_pin_gpio_mode(g->port, g->mask, flags);
+ else
+ /* Set up GPIO based on flags */
+ gpio_set_flags_by_mask(g->port, g->mask, flags);
}
}
diff --git a/chip/it83xx/registers.h b/chip/it83xx/registers.h
index 1d0f79c31d..26b8e57323 100644
--- a/chip/it83xx/registers.h
+++ b/chip/it83xx/registers.h
@@ -563,6 +563,15 @@ enum {
GPIO_I = 0x9,
GPIO_J = 0xa,
GPIO_M = 0xd,
+
+ /* NOTE: Support GPIO input only if KSO/KSI pins are used as GPIO. */
+ GPIO_KBS_OFF = 0x700,
+ /* KSI[7-0] GPIO data mirror register. */
+ GPIO_KSI = GPIO_KBS_OFF + 0x9,
+ /* KSO[15-8] GPIO data mirror register. */
+ GPIO_KSO_H = GPIO_KBS_OFF + 0xc,
+ /* KSO[7-0] GPIO data mirror register. */
+ GPIO_KSO_L = GPIO_KBS_OFF + 0xf,
};
#define DUMMY_GPIO_BANK GPIO_A