summaryrefslogtreecommitdiff
diff options
context:
space:
mode:
authorCHLin <chlin56@nuvoton.com>2015-12-01 13:21:28 +0800
committerchrome-bot <chrome-bot@chromium.org>2015-12-03 02:21:41 -0800
commitd161f78d42e6c08e1d1b4aa291664bad42eac5df (patch)
tree8db1518d3bd9ca0627cbae6a4f680f3168a346cf
parent3e73320f4dd9da2d693cbeded3c48f59f058adb0 (diff)
downloadchrome-ec-d161f78d42e6c08e1d1b4aa291664bad42eac5df.tar.gz
nuc: enable CLKRUN functionality for SERIRQ quiet mode.
Set alternative pin from GPIO to CLKRUN if SERIRQ is under quiet mode Once we need LCLK, CLKRUN will pull low automatically. Modified drivers: 1. lpc.c.: enable CLKRUN functionality for SERIRQ no matter continuous or quiet mode. BUG=chrome-os-partner:34346 TEST=make buildall -j; test nuvoton IC specific drivers BRANCH=none Change-Id: I58b11340833b26bc64bfe499272fd3b319b33202 Signed-off-by: CHLin <chlin56@nuvoton.com> Reviewed-on: https://chromium-review.googlesource.com/314971 Commit-Ready: CH Lin <chlin56@nuvoton.com> Tested-by: CH Lin <chlin56@nuvoton.com> Reviewed-by: Randall Spangler <rspangler@chromium.org>
-rw-r--r--chip/npcx/lpc.c6
1 files changed, 6 insertions, 0 deletions
diff --git a/chip/npcx/lpc.c b/chip/npcx/lpc.c
index 3d193abe73..ff1049e1ff 100644
--- a/chip/npcx/lpc.c
+++ b/chip/npcx/lpc.c
@@ -764,6 +764,12 @@ static void lpc_init(void)
/* Clear Host Access Hold state */
NPCX_SMC_CTL = 0xC0;
+ /*
+ * Set alternative pin from GPIO to CLKRUN no matter SERIRQ is under
+ * continuous or quiet mode.
+ */
+ SET_BIT(NPCX_DEVALT(1), NPCX_DEVALT1_CLKRN_SL);
+
/* Initialize Hardware for UART Host */
#if CONFIG_UART_HOST
/* Init COMx LPC UART */