diff options
| author | Kyoung Kim <kyoung.il.kim@intel.com> | 2016-02-12 09:18:23 -0800 |
|---|---|---|
| committer | chrome-bot <chrome-bot@chromium.org> | 2016-02-22 23:51:27 -0800 |
| commit | 2af857276d8653a021a14a867f2402bc7c67632f (patch) | |
| tree | 186508f0acbfa33ceb93c22f3767f307531e7400 | |
| parent | 3f55d939d9b3ed939a230dc86e560ab422f06883 (diff) | |
| download | chrome-ec-2af857276d8653a021a14a867f2402bc7c67632f.tar.gz | |
Lars_PD: GPIO correction
Reconfigure EC_INT pin due to external PU
for lower suspend power
BRANCH=firmware-glados-7820.B
BUG=chrome-os-partner:50159
TEST=measure PD power at S3/S0ix/SOC-G3
Change-Id: I94c89113e4feb12b63fbe402a6c6cfe0c2d10394
Signed-off-by: Kyoung Kim <kyoung.il.kim@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/327995
Commit-Ready: Kyoung Il Kim <kyoung.il.kim@intel.com>
Tested-by: Kyoung Il Kim <kyoung.il.kim@intel.com>
Reviewed-by: Shawn N <shawnn@chromium.org>
| -rw-r--r-- | board/lars_pd/gpio.inc | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/board/lars_pd/gpio.inc b/board/lars_pd/gpio.inc index e4ec89a0ba..277f059d72 100644 --- a/board/lars_pd/gpio.inc +++ b/board/lars_pd/gpio.inc @@ -32,7 +32,7 @@ GPIO(USB_C0_CC2_ODL, PIN(A, 12), GPIO_ODR_LOW) GPIO(SLAVE_I2C_SCL, PIN(B, 6), GPIO_INPUT) GPIO(SLAVE_I2C_SDA, PIN(B, 7), GPIO_INPUT) -GPIO(EC_INT, PIN(A, 14), GPIO_OUT_HIGH) +GPIO(EC_INT, PIN(A, 14), GPIO_ODR_HIGH) UNIMPLEMENTED(WP_L) UNIMPLEMENTED(ENTERING_RW) |