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| author | Bill Richardson <wfrichar@chromium.org> | 2016-03-24 18:09:52 -0700 |
|---|---|---|
| committer | chrome-bot <chrome-bot@chromium.org> | 2016-03-30 20:38:12 -0700 |
| commit | 55af6cc418c83c504f20145f075de645ff12aab6 (patch) | |
| tree | 2c4bfe3e025cbdc750cec55fc95ae9348120c320 | |
| parent | 91684d5e33396caccd4b91791e41c0a240764830 (diff) | |
| download | chrome-ec-55af6cc418c83c504f20145f075de645ff12aab6.tar.gz | |
Cr50: Handle possible resume from deep sleep
A resume from deep sleep looks a lot like a cold boot, but there
are some registers that need updating quickly. We need to disable
the settings that triggered deep sleep so that it isn't
accidentally invoked again, and we need to unfreeze any modules
or pins that were frozen during the deep sleep.
BUG=chrome-os-partner:49955
BRANCH=none
TEST=make buildall; test on Cr50
Since we aren't yet triggering deep sleep, this doesn't do
anything noticeable, which is the point. It shouldn't have any
effect unless we are entering deep sleep and DON'T do this when
it resumes. FWIW, I have tested that too, but it's coming in a
later CL.
Change-Id: I4b32fd2e24fe089d3f659154df26d275b41b4c1b
Signed-off-by: Bill Richardson <wfrichar@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/336450
Reviewed-by: Randall Spangler <rspangler@chromium.org>
| -rw-r--r-- | chip/g/jtag.c | 27 | ||||
| -rw-r--r-- | chip/g/registers.h | 1 |
2 files changed, 26 insertions, 2 deletions
diff --git a/chip/g/jtag.c b/chip/g/jtag.c index b80bca1b8d..c835e743d8 100644 --- a/chip/g/jtag.c +++ b/chip/g/jtag.c @@ -1,9 +1,32 @@ -/* Copyright (c) 2014 The Chromium OS Authors. All rights reserved. +/* Copyright 2016 The Chromium OS Authors. All rights reserved. * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ +#include "registers.h" + void jtag_pre_init(void) { - /* I don't think we need this to do anything */ + /* + * We don't need to do anything for JTAG, but if we're resuming from + * deep sleep we need to undo some stuff as soon as possible and this + * is the first init function that's called. + * + * It doesn't hurt anything if this setup is not needed, but we don't + * investigate the reset cause until much later (and doing so is + * destructive), so we'll just do the post-deep-sleep setup every time. + */ + + /* Disable the deep sleep triggers */ + GR_PMU_LOW_POWER_DIS = 0; + GR_PMU_EXITPD_MASK = 0; + + /* Unfreeze the USB module */ + GWRITE_FIELD(USB, PCGCCTL, STOPPCLK, 0); + GWRITE_FIELD(USB, PCGCCTL, RSTPDWNMODULE, 0); + GWRITE_FIELD(USB, PCGCCTL, PWRCLMP, 0); + + /* Unfreeze the PINMUX */ + GREG32(PINMUX, EXITEN0) = 0; + GREG32(PINMUX, HOLD) = 0; } diff --git a/chip/g/registers.h b/chip/g/registers.h index 2dd8509e1b..0d8d8a097e 100644 --- a/chip/g/registers.h +++ b/chip/g/registers.h @@ -92,6 +92,7 @@ #define GR_PMU_CLRRST GR_PMU_REG(GC_PMU_CLRRST_OFFSET) #define GR_PMU_RSTSRC GR_PMU_REG(GC_PMU_RSTSRC_OFFSET) #define GR_PMU_GLOBAL_RESET GR_PMU_REG(GC_PMU_GLOBAL_RESET_OFFSET) +#define GR_PMU_LOW_POWER_DIS GR_PMU_REG(GC_PMU_LOW_POWER_DIS_OFFSET) #define GR_PMU_SETDIS GR_PMU_REG(GC_PMU_SETDIS_OFFSET) #define GR_PMU_CLRDIS GR_PMU_REG(GC_PMU_CLRDIS_OFFSET) #define GR_PMU_STATDIS GR_PMU_REG(GC_PMU_STATDIS_OFFSET) |