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authorMary Ruthven <mruthven@chromium.org>2016-05-04 14:33:04 -0700
committerchrome-bot <chrome-bot@chromium.org>2016-06-03 20:14:59 -0700
commit6672aa1be1d1eaaefb7fecc0ff697c4ff54dcf8d (patch)
tree5618d008492f2b517648baf1aaa26a397fbcd8fc
parent767b6152158c0b718e819d6403e2b8e34bd74686 (diff)
downloadchrome-ec-6672aa1be1d1eaaefb7fecc0ff697c4ff54dcf8d.tar.gz
cr50: enable case closed debug
This change adds a ccd console command to control the usb endpoints. The uart console command is moved into this command so 'ccd uart [enable|disable]' controls the AP and EC TX signals instead of the 'uart' console command. CCD can be enabled using 'ccd enable'. This switches the PHY used by the USB controller to be the external PHY. Changing the PHY exposes the cr50, AP, and EC consoles as well as the upgrading mechanisms for the AP, EC and cr50. The AP and EC consoles will be read only until 'ccd uart enable' is called. Cr50 can be updated using the usb upgrade endpoint. The EC and AP can be updated using the USB SPI endpoint. When CCD is disabled the usb controller will switch to using the AP PHY. None of the endpoints will be visible to the host. The USB SPI endpoint can be used to flash the EC or AP using 'flashrom -p raiden_debug_spi:target=[AP|EC]'. If CCD is not enabled running flashrom using the raiden_debug_spi programmer will fail. Cr50 will not forward the commands to the external AP or EC ROM, so flashrom will not be able to find the chip. The UART TX signals are now controlled by the 'ccd uart' console command instead of the 'uart' console command. The UART TX is enabled separately from CCD, because we want to be able to enable CCD while servo is connected, and having the cr50 UART TX pins wired directly to the Servo TX lines could damage both devices. The AP and EC consoles are be read only until 'ccd uart enable' is called. 'ccd uart disable' disconnects the AP and EC TX pins from the UART peripheral. When RDD becomes reliable on cr50, ccd_set_mode will select the PHY being used by the g chip USB controller. BUG=chrome-os-partner:49960,chrome-os-partner:52281 BRANCH=none TEST=manual TEST SERVO power cycle the DUT connect servo and check that the AP and EC consoles still work check that both the AP and EC can be flashed using servo. TEST SUZY Q Attach Suzy Q Connect to the all three consoles. Check that the cr50 console is in read-write mode and the EC and AP consoles are read only. Attach Servo. Verify all of the servo functionality described above still works with suzy q attached and ccd enabled. Disconnect Servo. run 'ccd uart enable' on the cr50 console and check both the AP and EC consoles can be written to. Check that the AP and EC can be programmed using the raiden_debug_spi programmer. Change-Id: I96db2a72fc95086871c9e4c778c19ebd01efb851 Signed-off-by: Mary Ruthven <mruthven@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/342563
-rw-r--r--board/cr50/board.h4
-rw-r--r--board/cr50/rdd.c53
-rw-r--r--board/cr50/usb_spi.c29
-rw-r--r--common/case_closed_debug.c9
-rw-r--r--common/main.c2
5 files changed, 48 insertions, 49 deletions
diff --git a/board/cr50/board.h b/board/cr50/board.h
index 19d9c0b9a6..6c1ba85795 100644
--- a/board/cr50/board.h
+++ b/board/cr50/board.h
@@ -45,12 +45,16 @@
#define CONFIG_USB
#define CONFIG_USB_HID
#define CONFIG_USB_CONSOLE
+#define CONFIG_USB_INHIBIT_INIT
#define CONFIG_USB_SELECT_PHY
#define CONFIG_USB_SPI
#define CONFIG_STREAM_USART
#define CONFIG_STREAM_USB
+/* Enable Case Closed Debugging */
+#define CONFIG_CASE_CLOSED_DEBUG
+
#define CONFIG_USB_PID 0x5014
/* Enable SPI Master (SPI) module */
diff --git a/board/cr50/rdd.c b/board/cr50/rdd.c
index f6fc5bb572..f11b7a4951 100644
--- a/board/cr50/rdd.c
+++ b/board/cr50/rdd.c
@@ -3,6 +3,7 @@
* found in the LICENSE file.
*/
+#include "case_closed_debug.h"
#include "console.h"
#include "device_state.h"
#include "gpio.h"
@@ -13,7 +14,7 @@
#define CPRINTS(format, args...) cprints(CC_USB, format, ## args)
-static int enable;
+static int uart_enabled;
struct uart_config {
const char *name;
@@ -50,7 +51,7 @@ static int servo_is_connected(void)
void uartn_tx_connect(int uart)
{
- if (!enable)
+ if (!uart_enabled)
return;
if (servo_is_connected()) {
@@ -69,7 +70,7 @@ void uartn_tx_disconnect(int uart)
{
/* If servo is connected disable UART */
if (servo_is_connected())
- enable = 0;
+ uart_enabled = 0;
/* Disconnect the TX pin from UART peripheral */
uart_select_tx(uart, 0);
@@ -82,6 +83,8 @@ void rdd_attached(void)
/* Select the CCD PHY */
usb_select_phy(USB_SEL_PHY1);
+
+ ccd_set_mode(CCD_MODE_ENABLED);
}
void rdd_detached(void)
@@ -95,28 +98,40 @@ void rdd_detached(void)
/* Select the AP PHY */
usb_select_phy(USB_SEL_PHY0);
+
+ ccd_set_mode(CCD_MODE_DISABLED);
}
-static int command_uart(int argc, char **argv)
+static int command_ccd(int argc, char **argv)
{
if (argc > 1) {
- if (!strcasecmp("enable", argv[1])) {
- enable = 1;
- uartn_tx_connect(UART_EC);
- uartn_tx_connect(UART_AP);
- } else if (!strcasecmp("disable", argv[1])) {
- enable = 0;
- uartn_tx_disconnect(UART_EC);
- uartn_tx_disconnect(UART_AP);
- }
+ if (!strcasecmp("uart", argv[1]) && argc > 2) {
+ if (!strcasecmp("enable", argv[2])) {
+ uart_enabled = 1;
+ uartn_tx_connect(UART_EC);
+ uartn_tx_connect(UART_AP);
+ } else if (!strcasecmp("disable", argv[2])) {
+ uart_enabled = 0;
+ uartn_tx_disconnect(UART_EC);
+ uartn_tx_disconnect(UART_AP);
+ }
+ } else if (argc == 2) {
+ if (!strcasecmp("enable", argv[1]))
+ rdd_attached();
+ else if (!strcasecmp("disable", argv[1]))
+ rdd_detached();
+ } else
+ return EC_ERROR_PARAM1;
}
- ccprintf("AP UART %s\nEC UART %s\n",
- uartn_enabled(UART_AP) ? "enabled" : "disabled",
- uartn_enabled(UART_EC) ? "enabled" : "disabled");
+ ccprintf("CCD: %s\n", usb_get_phy() == USB_SEL_PHY1 ? " enabled" :
+ "disabled");
+ ccprintf("AP UART: %s\nEC UART: %s\n",
+ uartn_enabled(UART_AP) ? " enabled" : "disabled",
+ uartn_enabled(UART_EC) ? " enabled" : "disabled");
return EC_SUCCESS;
}
-DECLARE_CONSOLE_COMMAND(uart, command_uart,
- "[enable|disable]",
- "Get/set the UART TX connection state",
+DECLARE_CONSOLE_COMMAND(ccd, command_ccd,
+ "[uart] [enable|disable]",
+ "Get/set the case closed debug state",
NULL);
diff --git a/board/cr50/usb_spi.c b/board/cr50/usb_spi.c
index 806cba204f..53ad5702be 100644
--- a/board/cr50/usb_spi.c
+++ b/board/cr50/usb_spi.c
@@ -5,17 +5,13 @@
#include "console.h"
#include "gpio.h"
+#include "hooks.h"
#include "registers.h"
#include "spi.h"
#include "usb_spi.h"
-#include "hooks.h"
#define CPRINTS(format, args...) cprints(CC_USB, format, ## args)
-USB_SPI_CONFIG(usb_spi,
- USB_IFACE_SPI,
- USB_EP_SPI)
-
void disable_spi(void)
{
/* Configure SPI GPIOs */
@@ -120,26 +116,3 @@ int usb_spi_interface(struct usb_spi_config const *config,
hook_call_deferred(config->deferred, 0);
return 0;
}
-
-static int command_usb_spi(int argc, char **argv)
-{
- if (argc > 1) {
- if (!strcasecmp("enable", argv[1]))
- usb_spi_enable(&usb_spi, 1);
- else if (!strcasecmp("disable", argv[1])) {
- usb_spi_enable(&usb_spi, 0);
- disable_spi();
- }
- }
-
- ccprintf("%sSPI %s\n",
- usb_spi.state->enabled_host == USB_SPI_AP ? "AP " :
- usb_spi.state->enabled_host == USB_SPI_EC ? "EC" : "",
- usb_spi.state->enabled_device ? "enabled" : "disabled");
-
- return EC_SUCCESS;
-}
-DECLARE_CONSOLE_COMMAND(usb_spi, command_usb_spi,
- "[enable|disable]",
- "Get/set the usb spi state",
- NULL);
diff --git a/common/case_closed_debug.c b/common/case_closed_debug.c
index 31477b7554..53b85b1632 100644
--- a/common/case_closed_debug.c
+++ b/common/case_closed_debug.c
@@ -42,7 +42,7 @@ void ccd_set_mode(enum ccd_mode new_mode)
/*
* The forwarding of the local console over USB is read-only
- * if we are not in the fully enabled mode.
+ * if we are not in the fully enabled mode.
*/
usb_console_enable(new_mode != CCD_MODE_DISABLED,
new_mode != CCD_MODE_ENABLED);
@@ -51,6 +51,13 @@ void ccd_set_mode(enum ccd_mode new_mode)
usb_spi_enable(&ccd_usb_spi, new_mode == CCD_MODE_ENABLED);
#endif
+#if defined(CONFIG_USB_SELECT_PHY)
+ /*
+ * TODO(crosbug.com/p/52281): when rdd is working reliably on cr50, make
+ * a call to select the PHY here.
+ */
+#else
if (new_mode != CCD_MODE_DISABLED)
+#endif
usb_init();
}
diff --git a/common/main.c b/common/main.c
index bafb18c94a..4b537a79da 100644
--- a/common/main.c
+++ b/common/main.c
@@ -87,7 +87,7 @@ test_mockable __keep int main(void)
flash_pre_init();
#endif
-#if defined(CONFIG_CASE_CLOSED_DEBUG)
+#if defined(CONFIG_CASE_CLOSED_DEBUG) && defined(CONFIG_USB_POWER_DELIVERY)
/*
* If the device is locked we assert PD_NO_DEBUG, preventing the EC
* from interfering with the AP's access to the SPI flash.