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authorDavid Hendricks <dhendrix@chromium.org>2016-06-02 16:26:26 -0700
committerchrome-bot <chrome-bot@chromium.org>2016-06-03 03:00:07 -0700
commit82c803d93b6908adca93c88b70012b58db640d71 (patch)
tree28cc252a43c572c125d0dc1f99a7f78cfcfe4728
parentb5c56aba6f756eca9bfdeac67289ffafb9d37ff0 (diff)
downloadchrome-ec-82c803d93b6908adca93c88b70012b58db640d71.tar.gz
reef: Move PP3300 and PMIC enable to occur together
Update power sequencing as per Rachel's recommendation. We currently wait for PP5000_PG and PP3300_PG before enabling the PMIC. This changes the order so that we don't wait for PP3300_PG before setting the PMIC enable. BUG=chrome-os-partner:51323 BRANCH=none TEST=see scope shots mentioned in the BUG Signed-off-by: David Hendricks <dhendrix@chromium.org> Change-Id: I022a9ab21c1bcb70dc72f358dbf89acb656851b8 Reviewed-on: https://chromium-review.googlesource.com/349291 Reviewed-by: Aaron Durbin <adurbin@chromium.org>
-rw-r--r--board/reef/board.c12
1 files changed, 6 insertions, 6 deletions
diff --git a/board/reef/board.c b/board/reef/board.c
index 01c755ee2c..4a1a6aa95c 100644
--- a/board/reef/board.c
+++ b/board/reef/board.c
@@ -359,16 +359,16 @@ static void board_init(void)
*/
/* Enable PP5000 before PP3300 due to NFC: chrome-os-partner:50807 */
gpio_set_level(GPIO_EN_PP5000, 1);
-
- /* Enable 3.3V rail */
- gpio_set_level(GPIO_EN_PP3300, 1);
-
- while (!gpio_get_level(GPIO_PP3300_PG) ||
- !gpio_get_level(GPIO_PP5000_PG))
+ while (!gpio_get_level(GPIO_PP5000_PG))
;
/* Enable PMIC */
gpio_set_level(GPIO_V5A_EN, 1);
+
+ /* Enable 3.3V rail */
+ gpio_set_level(GPIO_EN_PP3300, 1);
+ while (!gpio_get_level(GPIO_PP3300_PG))
+ ;
}
/* PP3300 needs to be enabled before TCPC init hooks */
DECLARE_HOOK(HOOK_INIT, board_init, HOOK_PRIO_FIRST);