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authorDavid Schneider <dnschneid@chromium.org>2016-06-13 18:34:26 -0700
committerchrome-bot <chrome-bot@chromium.org>2016-06-14 16:30:09 -0700
commit77ef6189299a6ac752bd45ee77ca810f86ef2fb1 (patch)
tree8b91b72de0f365291a699187ae9282cb6227c636
parent4e3f5aa4a8bc96d0743fe42705ddad3379a0ff9a (diff)
downloadchrome-ec-77ef6189299a6ac752bd45ee77ca810f86ef2fb1.tar.gz
gru/kevin: Turn PP1800_PMU on earlier in sequence
PP1800_PMU impacts the initial centerlogic voltage due to DVS circuitry. Since there's no other sequencing dependency, turn it on earlier. This fixes centerlogic from initially starting too high (1.5V). BUG=none BRANCH=none TEST=Watch PPVAR_CENTERLOGIC and confirm that it starts at the target voltage Change-Id: Icac076a7e8aef978401452a98d9f6bc8b373d94f Signed-off-by: David Schneider <dnschneid@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/352247 Reviewed-by: Shawn N <shawnn@chromium.org>
-rw-r--r--power/rk3399.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/power/rk3399.c b/power/rk3399.c
index 6f2b0c6cba..0ae4786b51 100644
--- a/power/rk3399.c
+++ b/power/rk3399.c
@@ -119,9 +119,9 @@ enum power_state power_handle_state(enum power_state state)
gpio_set_level(GPIO_PP900_DDRPLL_EN, 1);
gpio_set_level(GPIO_PP900_PCIE_EN, 1);
msleep(2);
+ gpio_set_level(GPIO_PP1800_PMU_EN_L, 0);
gpio_set_level(GPIO_PPVAR_CLOGIC_EN, 1);
msleep(2);
- gpio_set_level(GPIO_PP1800_PMU_EN_L, 0);
gpio_set_level(GPIO_PP1800_USB_EN_L, 0);
gpio_set_level(GPIO_PP1800_AP_AVDD_EN_L, 0);
msleep(2);
@@ -227,9 +227,9 @@ enum power_state power_handle_state(enum power_state state)
msleep(10);
gpio_set_level(GPIO_PP1800_AP_AVDD_EN_L, 1);
gpio_set_level(GPIO_PP1800_USB_EN_L, 1);
- gpio_set_level(GPIO_PP1800_PMU_EN_L, 1);
msleep(10);
gpio_set_level(GPIO_PPVAR_CLOGIC_EN, 0);
+ gpio_set_level(GPIO_PP1800_PMU_EN_L, 1);
msleep(10);
gpio_set_level(GPIO_PP900_PCIE_EN, 0);
gpio_set_level(GPIO_PP900_DDRPLL_EN, 0);