elm: anx7688: add anx7688 hpd driver

ANX7688 is a TCPCI compatible port controller with HDMI to DP converter.
The HDMI converter needs a reset every time after enabling its function.

BRANCH=none
BUG=chrome-os-partner:52815
TEST=manual
  boot elm proto
  plug and unplug dingdong and check DP output
  plug/unplug adapter and check pd 0 state

Change-Id: I774421d7b0b8d2cfd31e860fcd4eaed08ee48ac7
Signed-off-by: Rong Chang <rongchang@chromium.org>
Signed-off-by: Tang Zhentian1 <ztang@analogixsemi.com>
Reviewed-on: https://chromium-review.googlesource.com/340371
Commit-Ready: Koro Chen <koro.chen@mediatek.com>
Tested-by: Koro Chen <koro.chen@mediatek.com>
Reviewed-by: Nicolas Boichat <drinkcat@chromium.org>

10 files changed, 324 insertions, 48 deletions

diff --git a/board/elm/board.c b/board/elm/board.c
index 29b77a5889..c0083c625b 100644
--- a/board/elm/board.c
+++ b/board/elm/board.c
@@ -17,6 +17,7 @@
 #include "console.h"
 #include "driver/accel_kionix.h"
 #include "driver/accel_kx022.h"
+#include "driver/tcpm/anx7688.h"
 #include "driver/tcpm/tcpci.h"
 #include "driver/temp_sensor/tmp432.h"
 #include "extpower.h"
@@ -62,15 +63,24 @@ void pd_mcu_interrupt(enum gpio_signal signal)
 #endif
 }
 
+void deferred_reset_pd_mcu(void);
+DECLARE_DEFERRED(deferred_reset_pd_mcu);
+
 void usb_evt(enum gpio_signal signal)
 {
 	/*
 	 * check if this is from BC12 or ANX7688 CABLE_DET
 	 * note that CABLE_DET can only trigger irq when 0 -> 1 (plug in)
-	 * since we use polling for CABLE_DET, just ignore this one for now
 	 */
 	if (!gpio_get_level(GPIO_BC12_WAKE_L))
 		task_set_event(TASK_ID_USB_CHG_P0, USB_CHG_EVENT_BC12, 0);
+
+	if (!gpio_get_level(GPIO_USB_C0_CABLE_DET_L) &&
+	    gpio_get_level(GPIO_USB_C0_PWR_EN_L)) {
+		hook_call_deferred(&deferred_reset_pd_mcu_data, -1);
+		/* pull PWR_EN after 10ms */
+		hook_call_deferred(&deferred_reset_pd_mcu_data, 10*MSEC);
+	}
 }
 
 #include "gpio_list.h"
@@ -125,7 +135,7 @@ const unsigned int spi_devices_used = ARRAY_SIZE(spi_devices);
 
 /* TCPC */
 const struct tcpc_config_t tcpc_config[CONFIG_USB_PD_PORT_COUNT] = {
-	{I2C_PORT_TCPC, CONFIG_TCPC_I2C_BASE_ADDR, &tcpci_tcpm_drv},
+	{I2C_PORT_TCPC, CONFIG_TCPC_I2C_BASE_ADDR, &anx7688_tcpm_drv},
 };
 
 struct pi3usb9281_config pi3usb9281_chips[] = {
@@ -171,10 +181,9 @@ struct ec_thermal_config thermal_params[] = {
 BUILD_ASSERT(ARRAY_SIZE(thermal_params) == TEMP_SENSOR_COUNT);
 
 struct usb_mux usb_muxes[CONFIG_USB_PD_PORT_COUNT] = {
-	/* TODO: 7688 support MUX Control 00b and 10b? */
 	{
 		.port_addr = 0, /* port idx */
-		.driver    = &tcpci_tcpm_usb_mux_driver,
+		.driver    = &anx7688_usb_mux_driver,
 	},
 };
 
@@ -182,27 +191,73 @@ struct usb_mux usb_muxes[CONFIG_USB_PD_PORT_COUNT] = {
  * Reset PD MCU
  *   ANX7688 needs a reset pulse of 50ms after power enable.
  */
-void deferred_reset_pd_mcu(void);
-DECLARE_DEFERRED(deferred_reset_pd_mcu);
-
 void deferred_reset_pd_mcu(void)
 {
-	if (!gpio_get_level(GPIO_USB_C0_RST)) {
+	uint8_t state = gpio_get_level(GPIO_USB_C0_PWR_EN_L) |
+			(gpio_get_level(GPIO_USB_C0_RST) << 1);
+
+	CPRINTS("%s %d", __func__, state);
+	switch (state) {
+	case 0:
+		/*
+		 * PWR_EN_L low, RST low
+		 * start reset sequence by turning off power enable
+		 * and wait for 1ms.
+		 */
+		gpio_set_level(GPIO_USB_C0_PWR_EN_L, 1);
+		hook_call_deferred(&deferred_reset_pd_mcu_data, 1*MSEC);
+		break;
+	case 1:
+		/*
+		 * PWR_EN_L high, RST low
+		 * pull PD reset pin and wait for another 1ms
+		 */
 		gpio_set_level(GPIO_USB_C0_RST, 1);
-		hook_call_deferred(&deferred_reset_pd_mcu_data, 50 * MSEC);
-	} else {
+		hook_call_deferred(&deferred_reset_pd_mcu_data, 1*MSEC);
+		/* on PD reset, trigger PD task to reset state */
+		task_set_event(TASK_ID_PD_C0, PD_EVENT_TCPC_RESET, 0);
+		break;
+	case 3:
+		/*
+		 * PWR_EN_L high, RST high
+		 * cable detected - enable power
+		 * cable not detected - do nothing
+		 */
+		if (gpio_get_level(GPIO_USB_C0_CABLE_DET_L))
+			return;
+		/* enable power and wait for 10ms then pull RESET_N */
+		gpio_set_level(GPIO_USB_C0_PWR_EN_L, 0);
+		hook_call_deferred(&deferred_reset_pd_mcu_data, 10*MSEC);
+		break;
+	case 2:
+		/*
+		 * PWR_EN_L low, RST high
+		 * leave reset state
+		 */
 		gpio_set_level(GPIO_USB_C0_RST, 0);
+		break;
 	}
 }
 
 void board_reset_pd_mcu(void)
 {
-	/* Perform ANX7688 startup sequence */
-	gpio_set_level(GPIO_USB_C0_PWR_EN_L, 0);
-	gpio_set_level(GPIO_USB_C0_RST, 0);
-	hook_call_deferred(&deferred_reset_pd_mcu_data, 0);
+	/* enable port controller's cable detection before reset */
+	anx7688_enable_cable_detection(0);
+
+	/* wait for 10ms, then start port controller's reset sequence */
+	hook_call_deferred(&deferred_reset_pd_mcu_data, 10*MSEC);
 }
 
+int command_pd_reset(int argc, char **argv)
+{
+	board_reset_pd_mcu();
+	return EC_SUCCESS;
+}
+DECLARE_CONSOLE_COMMAND(resetpd, command_pd_reset,
+			"",
+			"Reset PD IC",
+			NULL);
+
 /**
  * There is a level shift for AC_OK & LID_OPEN signal between AP & EC,
  * disable it (drive high) when AP is off, otherwise enable it (drive low).
@@ -217,13 +272,6 @@ static void board_extpower_buffer_to_soc(void)
 /* Initialize board. */
 static void board_init(void)
 {
-	/*
-	 * Assert wake GPIO to PD MCU to wake it from hibernate.
-	 * This cannot be done from board_pre_init() (or from any function
-	 * called before system_pre_init()), otherwise a spurious wake will
-	 * occur -- see stm32 check_reset_cause() WORKAROUND comment.
-	 */
-
 	/* Enable Level shift of AC_OK & LID_OPEN signals */
 	board_extpower_buffer_to_soc();
 	/* Enable rev1 testing GPIOs */
@@ -234,8 +282,8 @@ static void board_init(void)
 	/* Enable BC 1.2 */
 	gpio_enable_interrupt(GPIO_BC12_CABLE_INT);
 
-	/* Turn on PD */
-	board_reset_pd_mcu();
+	/* Check if typeC is already connected, and do 7688 power on flow */
+	usb_evt(0);
 
 	/* Update VBUS supplier */
 	usb_charger_vbus_change(0, pd_snk_is_vbus_provided(0));
diff --git a/board/elm/board.h b/board/elm/board.h
index ef2abd1028..46f4216af2 100644
--- a/board/elm/board.h
+++ b/board/elm/board.h
@@ -93,6 +93,7 @@
 
 #define CONFIG_USB_PD_PORT_COUNT 1
 #define CONFIG_USB_PD_TCPM_MUX
+#define CONFIG_USB_PD_TCPM_ANX7688
 #define CONFIG_USB_PD_TCPM_TCPCI
 #define CONFIG_USB_PD_TRY_SRC
 #define CONFIG_USB_PD_VBUS_DETECT_GPIO
@@ -209,11 +210,6 @@ void board_reset_pd_mcu(void);
 /* Set AP reset pin according to parameter */
 void board_set_ap_reset(int asserted);
 
-/* Control type-C DP route and hotplug detect signal */
-void board_typec_dp_on(int port);
-void board_typec_dp_off(int port, int *dp_flags);
-void board_typec_dp_set(int port, int level);
-
 #endif  /* !__ASSEMBLER__ */
 
 #endif  /* __CROS_EC_BOARD_H */
diff --git a/board/elm/gpio.inc b/board/elm/gpio.inc
index 7dbce4fde0..16591f11cd 100644
--- a/board/elm/gpio.inc
+++ b/board/elm/gpio.inc
@@ -79,8 +79,8 @@ GPIO(LEVEL_SHIFT_EN_L,  PIN(F, 10), GPIO_OUT_LOW)    /* LID/AC level shift */
 
 GPIO(USB_C0_5V_EN,      PIN(D, 8),  GPIO_OUT_LOW)    /* USBC port 0 5V */
 GPIO(USB_C0_CHARGE_L,   PIN(D, 9),  GPIO_OUT_LOW)    /* USBC port 0 charge */
-GPIO(USB_C0_RST,        PIN(D, 10), GPIO_OUT_LOW)    /* ANX7688 reset */
-GPIO(USB_C0_PWR_EN_L,   PIN(B, 15), GPIO_OUT_LOW)    /* ANX7688 power enable */
+GPIO(USB_C0_RST,        PIN(D, 10), GPIO_ODR_HIGH)    /* ANX7688 reset */
+GPIO(USB_C0_PWR_EN_L,   PIN(B, 15), GPIO_ODR_HIGH)    /* ANX7688 power enable */
 GPIO(USB_C0_EXTPWR_EN,  PIN(F, 2),  GPIO_OUT_HIGH)   /* ANX7688 3.3V ext power enable */
 GPIO(USB_DP_HPD,        PIN(F, 3),  GPIO_INPUT)
 GPIO(EN_TP_INT_L,       PIN(E, 14), GPIO_OUT_LOW)    /* touchpad interrupt enable */
diff --git a/board/elm/usb_pd_policy.c b/board/elm/usb_pd_policy.c
index e54ad16c93..2d27f539b9 100644
--- a/board/elm/usb_pd_policy.c
+++ b/board/elm/usb_pd_policy.c
@@ -7,6 +7,7 @@
 #include "charge_manager.h"
 #include "common.h"
 #include "console.h"
+#include "driver/tcpm/anx7688.h"
 #include "driver/tcpm/tcpci.h"
 #include "driver/tcpm/tcpm.h"
 #include "gpio.h"
@@ -24,7 +25,7 @@
 #define CPRINTS(format, args...) cprints(CC_USBPD, format, ## args)
 
 #define PDO_FIXED_FLAGS (PDO_FIXED_DUAL_ROLE | PDO_FIXED_DATA_SWAP |\
-			 PDO_FIXED_COMM_CAP | PDO_FIXED_EXTERNAL)
+			 PDO_FIXED_COMM_CAP)
 
 /* TODO: fill in correct source and sink capabilities */
 const uint32_t pd_src_pdo[] = {
@@ -56,11 +57,11 @@ int pd_set_power_supply_ready(int port)
 	/* Provide VBUS */
 	gpio_set_level(GPIO_USB_C0_5V_EN, 1);
 
+	anx7688_set_power_supply_ready(port);
+
 	/* notify host of power info change */
 	pd_send_host_event(PD_EVENT_POWER_CHANGE);
 
-	tcpc_write(port, TCPC_REG_COMMAND, 0x77);
-
 	return EC_SUCCESS;
 }
 
@@ -69,10 +70,10 @@ void pd_power_supply_reset(int port)
 	/* Disable VBUS */
 	gpio_set_level(GPIO_USB_C0_5V_EN, 0);
 
+	anx7688_power_supply_reset(port);
+
 	/* notify host of power info change */
 	pd_send_host_event(PD_EVENT_POWER_CHANGE);
-
-	tcpc_write(port, TCPC_REG_COMMAND, 0x66);
 }
 
 void pd_set_input_current_limit(int port, uint32_t max_ma,
@@ -306,6 +307,8 @@ static int svdm_dp_attention(int port, uint32_t *payload)
 	int irq = PD_VDO_DPSTS_HPD_IRQ(payload[1]);
 	int ack = 1;
 
+	anx7688_update_hpd(port, lvl, irq);
+
 	dp_status[port] = payload[1];
 	cur_lvl = gpio_get_level(GPIO_USB_DP_HPD);
 
@@ -327,6 +330,7 @@ static int svdm_dp_attention(int port, uint32_t *payload)
 static void svdm_exit_dp_mode(int port)
 {
 	svdm_safe_dp_mode(port);
+	anx7688_hpd_disable(port);
 }
 
 static int svdm_enter_gfu_mode(int port, uint32_t mode_caps)
diff --git a/driver/build.mk b/driver/build.mk
index cd4f377e28..e3d17ecb74 100644
--- a/driver/build.mk
+++ b/driver/build.mk
@@ -80,6 +80,7 @@ driver-$(CONFIG_USB_PD_TCPM_TCPCI)+=tcpm/tcpci.o
 driver-$(CONFIG_USB_PD_TCPM_FUSB302)+=tcpm/fusb302.o
 driver-$(CONFIG_USB_PD_TCPM_ITE83XX)+=tcpm/it83xx.o
 driver-$(CONFIG_USB_PD_TCPM_ANX74XX)+=tcpm/anx74xx.o
+driver-$(CONFIG_USB_PD_TCPM_ANX7688)+=tcpm/anx7688.o
 driver-$(CONFIG_USB_PD_TCPM_PS8751)+=tcpm/ps8751.o
 
 # USB switches
diff --git a/driver/tcpm/anx7688.c b/driver/tcpm/anx7688.c
new file mode 100644
index 0000000000..7e499629a8
--- /dev/null
+++ b/driver/tcpm/anx7688.c
@@ -0,0 +1,187 @@
+/* Copyright 2016 The Chromium OS Authors. All rights reserved.
+ * Use of this source code is governed by a BSD-style license that can be
+ * found in the LICENSE file.
+ */
+
+/* ANX7688 port manager */
+
+#include "hooks.h"
+#include "tcpci.h"
+#include "tcpm.h"
+#include "timer.h"
+#include "usb_mux.h"
+
+#define ANX7688_VENDOR_ALERT    (1 << 15)
+
+#define ANX7688_REG_STATUS      0x82
+#define ANX7688_REG_STATUS_LINK (1 << 0)
+
+#define ANX7688_REG_HPD         0x83
+#define ANX7688_REG_HPD_HIGH    (1 << 0)
+#define ANX7688_REG_HPD_IRQ     (1 << 1)
+#define ANX7688_REG_HPD_ENABLE  (1 << 2)
+
+#define ANX7688_USBC_ADDR		0x50
+#define ANX7688_REG_RAMCTRL		0xe7
+#define ANX7688_REG_RAMCTRL_BOOT_DONE	(1 << 6)
+
+static int anx7688_init(int port)
+{
+	int rv = 0;
+	int mask = 0;
+
+	/*
+	 * 7688 POWER_STATUS[6] is not reliable for tcpci_tcpm_init() to poll
+	 * due to it is default 0 in HW, and we cannot write TCPC until it is
+	 * ready, or something goes wrong. (Issue 52772)
+	 * Instead we poll TCPC 0x50:0xe7 bit6 here to make sure bootdone is
+	 * ready(50ms). Then PD main flow can process cc debounce in 50ms ~
+	 * 100ms to follow cts.
+	 */
+	while (1) {
+		rv = i2c_read8(I2C_PORT_TCPC, ANX7688_USBC_ADDR,
+			       ANX7688_REG_RAMCTRL, &mask);
+
+		if (rv == EC_SUCCESS && (mask & ANX7688_REG_RAMCTRL_BOOT_DONE))
+			break;
+		msleep(10);
+	}
+
+	rv = tcpci_tcpm_drv.init(port);
+	if (rv)
+		return rv;
+
+	rv = tcpc_read16(port, TCPC_REG_ALERT_MASK, &mask);
+	if (rv)
+		return rv;
+
+	/* enable vendor specific alert */
+	mask |= ANX7688_VENDOR_ALERT;
+	rv = tcpc_write16(port, TCPC_REG_ALERT_MASK, mask);
+	return rv;
+}
+
+static void anx7688_update_hpd_enable(int port)
+{
+	int status, reg, rv;
+
+	rv = tcpc_read(port, ANX7688_REG_STATUS, &status);
+	rv |= tcpc_read(port, ANX7688_REG_HPD, &reg);
+	if (rv)
+		return;
+
+	if (!(reg & ANX7688_REG_HPD_ENABLE) ||
+	    !(status & ANX7688_REG_STATUS_LINK)) {
+		reg &= ~ANX7688_REG_HPD_IRQ;
+		tcpc_write(port, ANX7688_REG_HPD,
+			   (status & ANX7688_REG_STATUS_LINK)
+			   ? reg | ANX7688_REG_HPD_ENABLE
+			   : reg & ~ANX7688_REG_HPD_ENABLE);
+	}
+}
+
+int anx7688_hpd_disable(int port)
+{
+	return tcpc_write(port, ANX7688_REG_HPD, 0);
+}
+
+int anx7688_update_hpd(int port, int level, int irq)
+{
+	int reg, rv;
+
+	rv = tcpc_read(port, ANX7688_REG_HPD, &reg);
+	if (rv)
+		return rv;
+
+	if (level)
+		reg |= ANX7688_REG_HPD_HIGH;
+	else
+		reg &= ~ANX7688_REG_HPD_HIGH;
+
+	if (irq)
+		reg |= ANX7688_REG_HPD_IRQ;
+	else
+		reg &= ~ANX7688_REG_HPD_IRQ;
+
+	return tcpc_write(port, ANX7688_REG_HPD, reg);
+}
+
+int anx7688_enable_cable_detection(int port)
+{
+	return tcpc_write(port, TCPC_REG_COMMAND, 0xff);
+}
+
+int anx7688_set_power_supply_ready(int port)
+{
+	return tcpc_write(port, TCPC_REG_COMMAND, 0x77);
+}
+
+int anx7688_power_supply_reset(int port)
+{
+	return tcpc_write(port, TCPC_REG_COMMAND, 0x66);
+}
+
+static void anx7688_tcpc_alert(int port)
+{
+	int alert, rv;
+
+	rv = tcpc_read16(port, TCPC_REG_ALERT, &alert);
+	/* process and clear alert status */
+	tcpci_tcpm_drv.tcpc_alert(port);
+
+	if (!rv && (alert & ANX7688_VENDOR_ALERT))
+		anx7688_update_hpd_enable(port);
+}
+
+static int anx7688_mux_set(int i2c_addr, mux_state_t mux_state)
+{
+	int reg = 0;
+	int rv, polarity;
+	int port = i2c_addr; /* use port index in port_addr field */
+
+	rv = tcpc_read(port, TCPC_REG_CONFIG_STD_OUTPUT, &reg);
+	if (rv != EC_SUCCESS)
+		return rv;
+
+	reg &= ~TCPC_REG_CONFIG_STD_OUTPUT_MUX_MASK;
+	if (mux_state & MUX_USB_ENABLED)
+		reg |= TCPC_REG_CONFIG_STD_OUTPUT_MUX_USB;
+	if (mux_state & MUX_DP_ENABLED)
+		reg |= TCPC_REG_CONFIG_STD_OUTPUT_MUX_DP;
+
+	/* ANX7688 needs to set bit0 */
+	rv = tcpc_read(port, TCPC_REG_TCPC_CTRL, &polarity);
+	if (rv != EC_SUCCESS)
+		return rv;
+
+	/* copy the polarity from TCPC_CTRL[0], take care clear then set */
+	reg &= ~TCPC_REG_TCPC_CTRL_POLARITY(1);
+	reg |= TCPC_REG_TCPC_CTRL_POLARITY(polarity);
+	return tcpc_write(port, TCPC_REG_CONFIG_STD_OUTPUT, reg);
+}
+
+/* ANX7688 is a TCPCI compatible port controller */
+const struct tcpm_drv anx7688_tcpm_drv = {
+	.init			= &anx7688_init,
+	.get_cc			= &tcpci_tcpm_get_cc,
+#ifdef CONFIG_USB_PD_VBUS_DETECT_TCPC
+	.get_vbus_level		= &tcpci_tcpm_get_vbus_level,
+#endif
+	.set_cc			= &tcpci_tcpm_set_cc,
+	.set_polarity		= &tcpci_tcpm_set_polarity,
+	.set_vconn		= &tcpci_tcpm_set_vconn,
+	.set_msg_header		= &tcpci_tcpm_set_msg_header,
+	.set_rx_enable		= &tcpci_tcpm_set_rx_enable,
+	.get_message		= &tcpci_tcpm_get_message,
+	.transmit		= &tcpci_tcpm_transmit,
+	.tcpc_alert		= &anx7688_tcpc_alert,
+};
+
+#ifdef CONFIG_USB_PD_TCPM_MUX
+const struct usb_mux_driver anx7688_usb_mux_driver = {
+	.init = tcpci_tcpm_mux_init,
+	.set = anx7688_mux_set,
+	.get = tcpci_tcpm_mux_get,
+};
+#endif /* CONFIG_USB_PD_TCPM_MUX */
+
diff --git a/driver/tcpm/anx7688.h b/driver/tcpm/anx7688.h
new file mode 100644
index 0000000000..534e4155b1
--- /dev/null
+++ b/driver/tcpm/anx7688.h
@@ -0,0 +1,21 @@
+/* Copyright 2016 The Chromium OS Authors. All rights reserved.
+ * Use of this source code is governed by a BSD-style license that can be
+ * found in the LICENSE file.
+ */
+
+/* USB Power delivery port management */
+
+#ifndef __CROS_EC_USB_PD_TCPM_ANX7688_H
+#define __CROS_EC_USB_PD_TCPM_ANX7688_H
+
+int anx7688_update_hpd(int port, int level, int irq);
+int anx7688_set_dp_pin_mode(int port, int pin_mode);
+int anx7688_enable_cable_detection(int port);
+int anx7688_set_power_supply_ready(int port);
+int anx7688_power_supply_reset(int port);
+int anx7688_hpd_disable(int port);
+
+extern struct tcpm_drv anx7688_tcpm_drv;
+extern struct usb_mux_driver anx7688_usb_mux_driver;
+
+#endif /* __CROS_EC_USB_PD_TCPM_ANX7688_H */
diff --git a/driver/tcpm/tcpci.c b/driver/tcpm/tcpci.c
index 4f8f96020d..37f009045c 100644
--- a/driver/tcpm/tcpci.c
+++ b/driver/tcpm/tcpci.c
@@ -54,7 +54,7 @@ static int init_power_status_mask(int port)
 	return rv;
 }
 
-static int tcpci_tcpm_get_cc(int port, int *cc1, int *cc2)
+int tcpci_tcpm_get_cc(int port, int *cc1, int *cc2)
 {
 	int status;
 	int rv;
@@ -85,7 +85,7 @@ static int tcpci_tcpm_get_power_status(int port, int *status)
 	return tcpc_read(port, TCPC_REG_POWER_STATUS, status);
 }
 
-static int tcpci_tcpm_set_cc(int port, int pull)
+int tcpci_tcpm_set_cc(int port, int pull)
 {
 	/*
 	 * Set manual control of Rp/Rd, and set both CC lines to the same
@@ -96,19 +96,19 @@ static int tcpci_tcpm_set_cc(int port, int pull)
 			  TCPC_REG_ROLE_CTRL_SET(0, 0, pull, pull));
 }
 
-static int tcpci_tcpm_set_polarity(int port, int polarity)
+int tcpci_tcpm_set_polarity(int port, int polarity)
 {
 	return tcpc_write(port, TCPC_REG_TCPC_CTRL,
 			  TCPC_REG_TCPC_CTRL_SET(polarity));
 }
 
-static int tcpci_tcpm_set_vconn(int port, int enable)
+int tcpci_tcpm_set_vconn(int port, int enable)
 {
 	return tcpc_write(port, TCPC_REG_POWER_CTRL,
 			  TCPC_REG_POWER_CTRL_SET(enable));
 }
 
-static int tcpci_tcpm_set_msg_header(int port, int power_role, int data_role)
+int tcpci_tcpm_set_msg_header(int port, int power_role, int data_role)
 {
 	return tcpc_write(port, TCPC_REG_MSG_HDR_INFO,
 			  TCPC_REG_MSG_HDR_INFO_SET(data_role, power_role));
@@ -120,7 +120,7 @@ static int tcpm_alert_status(int port, int *alert)
 	return tcpc_read16(port, TCPC_REG_ALERT, alert);
 }
 
-static int tcpci_tcpm_set_rx_enable(int port, int enable)
+int tcpci_tcpm_set_rx_enable(int port, int enable)
 {
 	/* If enable, then set RX detect for SOP and HRST */
 	return tcpc_write(port, TCPC_REG_RX_DETECT,
@@ -128,13 +128,13 @@ static int tcpci_tcpm_set_rx_enable(int port, int enable)
 }
 
 #ifdef CONFIG_USB_PD_VBUS_DETECT_TCPC
-static int tcpci_tcpm_get_vbus_level(int port)
+int tcpci_tcpm_get_vbus_level(int port)
 {
 	return tcpc_vbus[port];
 }
 #endif
 
-static int tcpci_tcpm_get_message(int port, uint32_t *payload, int *head)
+int tcpci_tcpm_get_message(int port, uint32_t *payload, int *head)
 {
 	int rv, cnt, reg = TCPC_REG_RX_DATA;
 
@@ -156,8 +156,8 @@ static int tcpci_tcpm_get_message(int port, uint32_t *payload, int *head)
 	return rv;
 }
 
-static int tcpci_tcpm_transmit(int port, enum tcpm_transmit_type type,
-			       uint16_t header, const uint32_t *data)
+int tcpci_tcpm_transmit(int port, enum tcpm_transmit_type type,
+			uint16_t header, const uint32_t *data)
 {
 	int reg = TCPC_REG_TX_DATA;
 	int rv, cnt = 4*PD_HEADER_CNT(header);
@@ -286,12 +286,12 @@ int tcpci_tcpm_init(int port)
 
 #ifdef CONFIG_USB_PD_TCPM_MUX
 
-static int tcpci_tcpm_mux_init(int i2c_addr)
+int tcpci_tcpm_mux_init(int i2c_addr)
 {
 	return EC_SUCCESS;
 }
 
-static int tcpci_tcpm_mux_set(int i2c_addr, mux_state_t mux_state)
+int tcpci_tcpm_mux_set(int i2c_addr, mux_state_t mux_state)
 {
 	int reg = 0;
 	int rv;
@@ -312,7 +312,7 @@ static int tcpci_tcpm_mux_set(int i2c_addr, mux_state_t mux_state)
 }
 
 /* Reads control register and updates mux_state accordingly */
-static int tcpci_tcpm_mux_get(int i2c_addr, mux_state_t *mux_state)
+int tcpci_tcpm_mux_get(int i2c_addr, mux_state_t *mux_state)
 {
 	int reg = 0;
 	int rv;
diff --git a/driver/tcpm/tcpci.h b/driver/tcpm/tcpci.h
index 744bbe6678..1256a4330c 100644
--- a/driver/tcpm/tcpci.h
+++ b/driver/tcpm/tcpci.h
@@ -8,6 +8,9 @@
 #ifndef __CROS_EC_USB_PD_TCPM_TCPCI_H
 #define __CROS_EC_USB_PD_TCPM_TCPCI_H
 
+#include "tcpm.h"
+#include "usb_mux.h"
+
 #define TCPC_REG_VENDOR_ID         0x0
 #define TCPC_REG_PRODUCT_ID        0x2
 #define TCPC_REG_BCD_DEV           0x4
@@ -111,4 +114,19 @@
 extern const struct tcpm_drv tcpci_tcpm_drv;
 extern const struct usb_mux_driver tcpci_tcpm_usb_mux_driver;
 
+int tcpci_tcpm_get_cc(int port, int *cc1, int *cc2);
+int tcpci_tcpm_get_vbus_level(int port);
+int tcpci_tcpm_set_cc(int port, int pull);
+int tcpci_tcpm_set_polarity(int port, int polarity);
+int tcpci_tcpm_set_vconn(int port, int enable);
+int tcpci_tcpm_set_msg_header(int port, int power_role, int data_role);
+int tcpci_tcpm_set_rx_enable(int port, int enable);
+int tcpci_tcpm_get_message(int port, uint32_t *payload, int *head);
+int tcpci_tcpm_transmit(int port, enum tcpm_transmit_type type,
+			uint16_t header, const uint32_t *data);
+
+int tcpci_tcpm_mux_init(int i2c_addr);
+int tcpci_tcpm_mux_set(int i2c_addr, mux_state_t mux_state);
+int tcpci_tcpm_mux_get(int i2c_addr, mux_state_t *mux_state);
+
 #endif /* __CROS_EC_USB_PD_TCPM_TCPCI_H */
diff --git a/include/config.h b/include/config.h
index 35f6162ad1..c432d25c6c 100644
--- a/include/config.h
+++ b/include/config.h
@@ -1905,6 +1905,7 @@
 #undef CONFIG_USB_PD_TCPM_FUSB302
 #undef CONFIG_USB_PD_TCPM_ITE83XX
 #undef CONFIG_USB_PD_TCPM_ANX74XX
+#undef CONFIG_USB_PD_TCPM_ANX7688
 #undef CONFIG_USB_PD_TCPM_PS8751
 
 /*