diff options
| author | Aaron Durbin <adurbin@chromium.org> | 2016-08-23 10:19:20 -0500 |
|---|---|---|
| committer | chrome-bot <chrome-bot@chromium.org> | 2016-08-23 15:37:10 -0700 |
| commit | aee8407f4e62efefb944f9050de7ae80032b4651 (patch) | |
| tree | de85810745694467883d7acaed98f707f443c735 | |
| parent | d0383d88146e19c64230670aa6769528e5228c76 (diff) | |
| download | chrome-ec-aee8407f4e62efefb944f9050de7ae80032b4651.tar.gz | |
reef: ensure board can boot again after entring G3 after SW sync
When SW sync is enabled and the board enters G3 after being up
there was no way to boot the board again because the
system_jumped_to_this_image() check disallowed the pmic startup
sequence. One needs to check if the pmic is also already on
before bailing on the pmic startup sequence.
BUG=chrome-os-partner:56530
BRANCH=None
TEST=Booted. Jumped to RW EC. Shutdown system. Can boot again once
G3 entered.
Change-Id: I71670ceee09536a282479d1eca6a3ce264f0f5d3
Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/374080
Reviewed-by: Furquan Shaikh <furquan@chromium.org>
| -rw-r--r-- | board/reef/board.c | 8 |
1 files changed, 6 insertions, 2 deletions
diff --git a/board/reef/board.c b/board/reef/board.c index 173ae126f0..4cfc582184 100644 --- a/board/reef/board.c +++ b/board/reef/board.c @@ -356,8 +356,12 @@ const struct button_config buttons[CONFIG_BUTTON_COUNT] = { /* Called by APL power state machine when transitioning from G3 to S5 */ static void chipset_pre_init(void) { - /* No need to re-init PMIC since settings are sticky across sysjump */ - if (system_jumped_to_this_image()) + /* + * No need to re-init PMIC since settings are sticky across sysjump. + * However, be sure to check that PMIC is already enabled. If it is + * then there's no need to re-sequence the PMIC. + */ + if (system_jumped_to_this_image() && gpio_get_level(GPIO_PMIC_EN)) return; #if IS_PROTO == 0 |