diff options
| author | Mary Ruthven <mruthven@chromium.org> | 2016-09-01 15:22:30 -0700 |
|---|---|---|
| committer | chrome-bot <chrome-bot@chromium.org> | 2016-09-09 14:42:38 -0700 |
| commit | d4899e7cb30d484d2894073f60316c1d8d2212b2 (patch) | |
| tree | 2b2b520cffdf8692338465b68d9582b0311e3efa | |
| parent | 19664334276dfea2648db4cd14a0e58e700e9683 (diff) | |
| download | chrome-ec-d4899e7cb30d484d2894073f60316c1d8d2212b2.tar.gz | |
cr50: assert EC_RST_L when trying to flash the AP
On different systems SYS_RST may be edge triggered, so it is not
guaranteed holding it low will hold the AP in reset. With this change,
enable_ap_spi now holds the EC in reset, so it is guaranteed the AP is
in reset.
BUG=chrome-os-partner:54982
BRANCH=none
TEST=run 'sudo flashrom -p raiden_debug_spi:target=[EC|AP] --flash-name'
on gru, kevin and reef
Change-Id: I3176462b932eba5bf8d69dbab70500bca8c7ff46
Signed-off-by: Mary Ruthven <mruthven@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/380484
Reviewed-by: Bill Richardson <wfrichar@chromium.org>
Reviewed-by: Vadim Bendebury <vbendeb@chromium.org>
| -rw-r--r-- | board/cr50/usb_spi.c | 11 |
1 files changed, 6 insertions, 5 deletions
diff --git a/board/cr50/usb_spi.c b/board/cr50/usb_spi.c index 89fb17325c..02d6525cdd 100644 --- a/board/cr50/usb_spi.c +++ b/board/cr50/usb_spi.c @@ -8,6 +8,7 @@ #include "hooks.h" #include "registers.h" #include "spi.h" +#include "system.h" #include "timer.h" #include "usb_spi.h" @@ -45,6 +46,9 @@ void enable_ap_spi(void) gpio_set_level(GPIO_AP_FLASH_SELECT, 1); gpio_set_level(GPIO_EC_FLASH_SELECT, 0); + /* hold the EC in reset */ + GWRITE(RBOX, ASSERT_EC_RST, 1); + /* Set SYS_RST_L as an output */ ASSERT(GREAD(PINMUX, GPIO0_GPIO4_SEL) == GC_PINMUX_DIOM0_SEL); GWRITE(PINMUX, DIOM0_SEL, GC_PINMUX_GPIO0_GPIO4_SEL); @@ -65,12 +69,9 @@ static void update_finished(void) /* * The AP and EC are reset in usb_spi_enable so the TPM is in a bad - * state. Assert SYS_RST_L to reset the state. + * state. Do a hard reset to reset the entire system. */ - ASSERT(GREAD(PINMUX, GPIO0_GPIO4_SEL) == GC_PINMUX_DIOM0_SEL); - GWRITE(PINMUX, DIOM0_SEL, GC_PINMUX_GPIO0_GPIO4_SEL); - gpio_set_flags(GPIO_SYS_RST_L_OUT, GPIO_OUT_HIGH); - gpio_set_level(GPIO_SYS_RST_L_OUT, 0); + system_reset(SYSTEM_RESET_HARD); } DECLARE_DEFERRED(update_finished); |