diff options
| author | Mary Ruthven <mruthven@chromium.org> | 2016-09-22 15:01:13 -0700 |
|---|---|---|
| committer | chrome-bot <chrome-bot@chromium.org> | 2016-09-23 15:10:06 -0700 |
| commit | 806aae81f6bed5ab1a26e860eaa2b5b1349a1444 (patch) | |
| tree | 94c3401d14adc1d78c2ef17e557b0d0c3c2776c5 | |
| parent | 3c7b251df95d8a1495b191b1f77054f5168f0a5a (diff) | |
| download | chrome-ec-806aae81f6bed5ab1a26e860eaa2b5b1349a1444.tar.gz | |
cr50: wake from deep sleep on rising edge of AP UART
The AP UART is used to detect if the device is in s0. When it is cr50
should not be in deep sleep for any reason. This change makes DIOA5 a
wake pin before entering deep sleep.
BUG=chrome-os-partner:56100
BRANCH=none
TEST=make buildall
Change-Id: Icb57824c0ca1421f5f508fce7cf5609010b91e32
Signed-off-by: Mary Ruthven <mruthven@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/388793
Reviewed-by: Scott Collyer <scollyer@chromium.org>
| -rw-r--r-- | board/cr50/board.c | 8 |
1 files changed, 8 insertions, 0 deletions
diff --git a/board/cr50/board.c b/board/cr50/board.c index b3eb22741d..08274a6ba9 100644 --- a/board/cr50/board.c +++ b/board/cr50/board.c @@ -164,6 +164,14 @@ void board_configure_deep_sleep_wakepins(void) /* TODO remove i2cs wake event */ /* + * DIOA3 is GPIO_DETECT_AP which is used to detect if the AP is in S0. + * If the AP is in s0, cr50 should not be in deep sleep so wake up. + */ + GWRITE_FIELD(PINMUX, EXITEDGE0, DIOA3, 1); /* edge sensitive */ + GWRITE_FIELD(PINMUX, EXITINV0, DIOA3, 0); /* wake on high */ + GWRITE_FIELD(PINMUX, EXITEN0, DIOA3, 1); /* GPIO_DETECT_AP */ + + /* * Whether it is a short pulse or long one waking on the rising edge is * fine because the goal of sys_rst is to reset the TPM and after * resuming from deep sleep the TPM will be reset. Cr50 doesn't need to |