summaryrefslogtreecommitdiff
diff options
context:
space:
mode:
authorVadim Bendebury <vbendeb@chromium.org>2016-10-03 14:08:42 -0700
committerchrome-bot <chrome-bot@chromium.org>2016-10-04 00:33:58 -0700
commit0f7d6806b77657e6248247fa89b862ce948f1698 (patch)
tree01431951729c697ead81f295d650ea8c3e6b5bf6
parent240d03b780d1b4c91eb5a0e439e0c50af2d66888 (diff)
downloadchrome-ec-0f7d6806b77657e6248247fa89b862ce948f1698.tar.gz
i2cs: reset local variables when reinitializing.
When tpm is reset the i2c slave interface initialization function is called, but it does not quite re-initialize the interface. This patch adds both a hardware pulse to make sure that the i2c slave interface state machine is set into the initial state, and code to zero static variables of the driver. BRANCH=none BUG=none TEST=with the change on the AP firmware side which prevents losing i2c ready interrupts early in the process tpm reset became much more reliable. Resetting from EC, AP of cr50 consoles reliably restarts reef without any TPM communications problems. Change-Id: I604607c32d4dfc554b245d3d3d82b9ad38271962 Signed-off-by: Vadim Bendebury <vbendeb@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/392306 Reviewed-by: Scott Collyer <scollyer@chromium.org>
-rw-r--r--chip/g/i2cs.c17
1 files changed, 17 insertions, 0 deletions
diff --git a/chip/g/i2cs.c b/chip/g/i2cs.c
index 507fbfcb1a..7cced88fcc 100644
--- a/chip/g/i2cs.c
+++ b/chip/g/i2cs.c
@@ -105,6 +105,23 @@ static void i2cs_init(void)
pmu_clock_en(PERIPH_I2CS);
+ /*
+ * Toggle the reset register to make sure i2cs interface is in the
+ * initial state even if it is mid transaction at this time.
+ */
+ GWRITE_FIELD(PMU, RST0, DI2CS0, 1);
+
+ /*
+ * This initialization is guraranteed to take way more than enough
+ * time for the reset to kick in.
+ */
+ memset(i2cs_buffer, 0, sizeof(i2cs_buffer));
+ last_write_pointer = 0;
+ last_read_pointer = 0;
+
+ GWRITE_FIELD(PMU, RST0, DI2CS0, 0);
+
+
/* Set pinmux registers for I2CS interface */
i2cs_set_pinmux();