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| author | CHLin <CHLIN56@nuvoton.com> | 2017-01-09 14:55:20 +0800 |
|---|---|---|
| committer | chrome-bot <chrome-bot@chromium.org> | 2017-01-09 23:47:50 -0800 |
| commit | 52d333662a1d463223bcee4792cc7abd3e3482d6 (patch) | |
| tree | e5a2ba0a57b4a9873641f10fa931102afe4c9bb5 | |
| parent | 690ab41d892cfe5b71ef1d4ffc658884f35184e5 (diff) | |
| download | chrome-ec-52d333662a1d463223bcee4792cc7abd3e3482d6.tar.gz | |
npcx: shi: fix bug of clearing EVSTAT_EOR bit
It is not proper to use SET_BIT macro to clear a "write 1 to clear" bit
in a register. It will also clear other bits if they are also set.
BRANCH=none
BUG=chrome-os-partner:34346
TEST=make buildall; boot up on gru, run ectool stress test for a while
without problem.
Change-Id: I0c5a850e85e41820515b1a8f15bb43d77397737f
Signed-off-by: CHLin <CHLIN56@nuvoton.com>
Reviewed-on: https://chromium-review.googlesource.com/425589
Commit-Ready: CH Lin <chlin56@nuvoton.com>
Tested-by: CH Lin <chlin56@nuvoton.com>
Reviewed-by: Shawn N <shawnn@chromium.org>
| -rw-r--r-- | chip/npcx/shi.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/chip/npcx/shi.c b/chip/npcx/shi.c index 0e1b8b608d..9c5aec1f56 100644 --- a/chip/npcx/shi.c +++ b/chip/npcx/shi.c @@ -687,7 +687,7 @@ void shi_cs_event(enum gpio_signal signal) * Clear possible EOR event from previous transaction since it's * irrelevant now that CS is re-asserted. */ - SET_BIT(NPCX_EVSTAT, NPCX_EVSTAT_EOR); + NPCX_EVSTAT = 1 << NPCX_EVSTAT_EOR; /* * Enable SHI interrupt - we will either succeed to parse our host |