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| author | Bruce <Bruce.Wan@quantatw.com> | 2017-02-18 13:56:38 +0800 |
|---|---|---|
| committer | chrome-bot <chrome-bot@chromium.org> | 2017-02-18 23:56:00 -0800 |
| commit | a24d8db15402a25ca0e6e2d571b024236488a393 (patch) | |
| tree | 34a3bfb87cb4203508eb350476c6a479a01713b9 | |
| parent | 114f5cee5ac4af758882a7557cbdf91fbc8e4698 (diff) | |
| download | chrome-ec-a24d8db15402a25ca0e6e2d571b024236488a393.tar.gz | |
pyro: Open interrupt gate for trackpad
Follow reef setting.
BUG=none
BRANCH=reef
TEST=Verified the value was 0 by gpioget command
Change-Id: If471f4f5495e46b2b4712816edfe481e287d50fa
Signed-off-by: Bruce.Wan <Bruce.Wan@quantatw.com>
Reviewed-on: https://chromium-review.googlesource.com/444592
Commit-Ready: Keith Tzeng <keith.tzeng@quantatw.com>
Tested-by: Keith Tzeng <keith.tzeng@quantatw.com>
Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
| -rw-r--r-- | board/pyro/gpio.inc | 6 |
1 files changed, 5 insertions, 1 deletions
diff --git a/board/pyro/gpio.inc b/board/pyro/gpio.inc index eb83c38fd5..5e8ce38343 100644 --- a/board/pyro/gpio.inc +++ b/board/pyro/gpio.inc @@ -85,6 +85,11 @@ GPIO(PP3300_PG, PIN(6, 2), GPIO_INPUT) GPIO(EN_PP5000, PIN(C, 6), GPIO_OUT_LOW) GPIO(PP5000_PG, PIN(7, 1), GPIO_INPUT) GPIO(EN_P3300_TRACKPAD_ODL, PIN(3, 2), GPIO_ODR_LOW) +/* + * Control the gate for trackpad IRQ. High closes the gate. + * This is always set low so that the OS can manage the trackpad. + */ +GPIO(TRACKPAD_INT_GATE, PIN(A, 1), GPIO_OUT_LOW) GPIO(PCH_SYS_PWROK, PIN(E, 7), GPIO_OUT_LOW) /* EC_PCH_PWROK */ GPIO(ENABLE_BACKLIGHT, PIN(9, 7), GPIO_ODR_HIGH | GPIO_SEL_1P8V) /* EC_BL_EN_OD */ @@ -102,7 +107,6 @@ GPIO(PCH_WAKE_L, PIN(8, 1), GPIO_ODR_HIGH) /* EC_PCH_WAKE_ODL */ GPIO(USB_C0_HPD_1P8_ODL, PIN(9, 4), GPIO_INPUT | GPIO_SEL_1P8V) GPIO(USB_C1_HPD_1P8_ODL, PIN(A, 5), GPIO_INPUT | GPIO_SEL_1P8V) -GPIO(USB2_OTG_ID, PIN(A, 1), GPIO_OUTPUT) /* FIXME: what should this init to? */ GPIO(USB2_OTG_VBUSSENSE, PIN(9, 5), GPIO_OUTPUT) /* EC_PCH_RTCRST is a sledgehammer for resetting SoC state and should rarely |