diff options
| author | Daisuke Nojiri <dnojiri@chromium.org> | 2017-01-12 09:15:51 -0800 |
|---|---|---|
| committer | chrome-bot <chrome-bot@chromium.org> | 2017-01-31 19:53:30 -0800 |
| commit | bf557f235a7b0154a751513f0f2975a437763e3e (patch) | |
| tree | f82ddda5f83e681d89efbb280d9c356eda80cd0e | |
| parent | 8486e045113b96b53dd93cd91f3fc69cd6b2aceb (diff) | |
| download | chrome-ec-bf557f235a7b0154a751513f0f2975a437763e3e.tar.gz | |
Reef: Open interrupt gate for trackpad
This change explicitly sets the GPIO pin connected to the trackpad
IRQ gate low. The GPIO output registers are reset to zero.
So, this patch doesn't practically change anything.
BUG=chrome-os-partner:58792
BRANCH=none
TEST=Verified the value was 0 by gpioget command and the trackpad was
functional on a current Electro & a reworked Electro.
Change-Id: I52fec1efdd29453ee121cf1705242d877c0c4f1f
Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/427369
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
| -rw-r--r-- | board/reef/gpio.inc | 4 |
1 files changed, 3 insertions, 1 deletions
diff --git a/board/reef/gpio.inc b/board/reef/gpio.inc index 90ea3cf2fc..fb45f2336b 100644 --- a/board/reef/gpio.inc +++ b/board/reef/gpio.inc @@ -90,6 +90,9 @@ GPIO(PP3300_PG, PIN(6, 2), GPIO_INPUT) GPIO(EN_PP5000, PIN(C, 6), GPIO_OUT_LOW) GPIO(PP5000_PG, PIN(7, 1), GPIO_INPUT) GPIO(EN_P3300_TRACKPAD_ODL, PIN(3, 2), GPIO_ODR_LOW) +/* Control the gate for trackpad IRQ. High closes the gate. + * This is always set low so that the OS can manage the trackpad. */ +GPIO(TRACKPAD_INT_GATE, PIN(A, 1), GPIO_OUT_LOW) GPIO(PCH_SYS_PWROK, PIN(E, 7), GPIO_OUT_LOW) /* EC_PCH_PWROK */ GPIO(ENABLE_BACKLIGHT, PIN(9, 7), GPIO_ODR_HIGH | GPIO_SEL_1P8V) /* EC_BL_EN_OD */ @@ -107,7 +110,6 @@ GPIO(PCH_WAKE_L, PIN(8, 1), GPIO_ODR_HIGH) /* EC_PCH_WAKE_ODL */ GPIO(USB_C0_HPD_1P8_ODL, PIN(9, 4), GPIO_INPUT | GPIO_SEL_1P8V) GPIO(USB_C1_HPD_1P8_ODL, PIN(A, 5), GPIO_INPUT | GPIO_SEL_1P8V) -GPIO(USB2_OTG_ID, PIN(A, 1), GPIO_OUTPUT) /* FIXME: what should this init to? */ GPIO(USB2_OTG_VBUSSENSE, PIN(9, 5), GPIO_OUTPUT) /* EC_PCH_RTCRST is a sledgehammer for resetting SoC state and should rarely |