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authorShawn Nematbakhsh <shawnn@chromium.org>2017-02-28 10:37:24 -0800
committerchrome-bot <chrome-bot@chromium.org>2017-03-01 16:36:24 -0800
commit850a227aea334bbb82119cf7811d4a53b72de23e (patch)
tree46d8c65246c0f3f6f21b97addbd1f6f09f762eeb
parent1c16a8040c406bc47d9bc42e34270d601a95a4e3 (diff)
downloadchrome-ec-850a227aea334bbb82119cf7811d4a53b72de23e.tar.gz
npcx: flash: Lock all flash access before flash_execute_cmd() calls
Any call to flash_execute_cmd() can interfere with UMA / mapped read access, so grab the mutex first. BUG=b:35587287,b:35848370 BRANCH=reef TEST=Verify SW sync completes 8 hour stress test on kevin. Also verify 'ectool flashspiinfo' succeeds. Change-Id: Ib1b04371546c27517c1b1ac860e9afbc1fed435e Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/447905 Commit-Ready: Shawn N <shawnn@chromium.org> Tested-by: Shawn N <shawnn@chromium.org> Reviewed-by: Aseda Aboagye <aaboagye@chromium.org> Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
-rw-r--r--chip/npcx/flash.c41
1 files changed, 39 insertions, 2 deletions
diff --git a/chip/npcx/flash.c b/chip/npcx/flash.c
index 4921e5200f..457cbf4c91 100644
--- a/chip/npcx/flash.c
+++ b/chip/npcx/flash.c
@@ -60,6 +60,9 @@ static void flash_pinmux(int enable)
static void flash_execute_cmd(uint8_t code, uint8_t cts)
{
+ /* Flash mutex must be held while executing UMA commands. */
+ ASSERT(flash_lock.lock);
+
/* set UMA_CODE */
NPCX_UMA_CODE = code;
/* execute UMA flash transaction */
@@ -140,36 +143,61 @@ static void flash_set_address(uint32_t dest_addr)
static uint8_t flash_get_status1(void)
{
+ uint8_t ret;
+
if (all_protected)
return saved_sr1;
+ /* Lock physical flash operations */
+ flash_lock_mapped_storage(1);
+
/* Disable tri-state */
TRISTATE_FLASH(0);
/* Read status register1 */
flash_execute_cmd(CMD_READ_STATUS_REG, MASK_CMD_RD_1BYTE);
/* Enable tri-state */
TRISTATE_FLASH(1);
- return NPCX_UMA_DB0;
+
+ ret = NPCX_UMA_DB0;
+
+ /* Unlock physical flash operations */
+ flash_lock_mapped_storage(0);
+
+ return ret;
}
static uint8_t flash_get_status2(void)
{
+ uint8_t ret;
+
if (all_protected)
return saved_sr2;
+ /* Lock physical flash operations */
+ flash_lock_mapped_storage(1);
+
/* Disable tri-state */
TRISTATE_FLASH(0);
/* Read status register2 */
flash_execute_cmd(CMD_READ_STATUS_REG2, MASK_CMD_RD_1BYTE);
/* Enable tri-state */
TRISTATE_FLASH(1);
- return NPCX_UMA_DB0;
+
+ ret = NPCX_UMA_DB0;
+
+ /* Unlock physical flash operations */
+ flash_lock_mapped_storage(0);
+
+ return ret;
}
#ifdef CONFIG_HOSTCMD_FLASH_SPI_INFO
void flash_get_mfr_dev_id(uint8_t *dest)
{
+ /* Lock physical flash operations */
+ flash_lock_mapped_storage(1);
+
/* Disable tri-state */
TRISTATE_FLASH(0);
/* Read manufacturer and device ID. Send cmd=0x90 + 24-bit address=0 */
@@ -181,10 +209,16 @@ void flash_get_mfr_dev_id(uint8_t *dest)
dest[0] = NPCX_UMA_DB0;
dest[1] = NPCX_UMA_DB1;
+
+ /* Unlock physical flash operations */
+ flash_lock_mapped_storage(0);
}
void flash_get_jedec_id(uint8_t *dest)
{
+ /* Lock physical flash operations */
+ flash_lock_mapped_storage(1);
+
/* Disable tri-state */
TRISTATE_FLASH(0);
/* Read manufacturer and device ID */
@@ -195,6 +229,9 @@ void flash_get_jedec_id(uint8_t *dest)
dest[0] = NPCX_UMA_DB0;
dest[1] = NPCX_UMA_DB1;
dest[2] = NPCX_UMA_DB2;
+
+ /* Unlock physical flash operations */
+ flash_lock_mapped_storage(0);
}
#endif /* CONFIG_HOSTCMD_FLASH_SPI_INFO */