diff options
| author | Archana Patni <archana.patni@intel.com> | 2017-04-25 18:23:26 +0530 |
|---|---|---|
| committer | chrome-bot <chrome-bot@chromium.org> | 2017-05-02 02:59:31 -0700 |
| commit | cc0068da343b50075eefe47b8cfc74cbfda3c493 (patch) | |
| tree | 498eb70900766710728152e9b57ec3c3f4b130d5 | |
| parent | 2b4d06721a0eb5414e274919e9747eddf710e907 (diff) | |
| download | chrome-ec-cc0068da343b50075eefe47b8cfc74cbfda3c493.tar.gz | |
power/intel_x86: add tablet switch event wake masks
The wake mask programming for S0ix is done in
EC. This patch adds handling for the tablet switch
events in the S0ix flows.
BRANCH=none
BUG=b:37223093
TEST=attach or detach base and check if event is generated
Signed-off-by: Subramony Sesha <subramony.sesha@intel.com>
Signed-off-by: Archana Patni <archana.patni@intel.com>
Signed-off-by: Jenny TC <jenny.tc@intel.com>
Change-Id: Ibd53e85d5a3a1b776e519b70860404684c9ab0fb
Reviewed-on: https://chromium-review.googlesource.com/486462
Commit-Ready: Jenny Tc <jenny.tc@intel.com>
Tested-by: Jenny Tc <jenny.tc@intel.com>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-by: Furquan Shaikh <furquan@chromium.org>
| -rw-r--r-- | power/intel_x86.c | 18 |
1 files changed, 10 insertions, 8 deletions
diff --git a/power/intel_x86.c b/power/intel_x86.c index 13f2be53ac..6b87c88d83 100644 --- a/power/intel_x86.c +++ b/power/intel_x86.c @@ -100,15 +100,16 @@ static enum power_state power_wait_s5_rtc_reset(void) * The chipset_in_state(CHIPSET_STATE_STANDBY | CHIPSET_STATE_ON) * is used to detect the S0ix transiton. * - * During S0ix entry, the wake mask for lid open is enabled. + * During S0ix entry, the wake mask for lid open and tablet mode is enabled. */ -static void s0ix_lpc_enable_wake_mask_for_lid_open(void) +static void s0ix_lpc_enable_wake_mask(void) { if (chipset_in_state(CHIPSET_STATE_STANDBY | CHIPSET_STATE_ON)) { uint32_t mask; mask = lpc_get_host_event_mask(LPC_HOST_EVENT_WAKE) | - EC_HOST_EVENT_MASK(EC_HOST_EVENT_LID_OPEN); + EC_HOST_EVENT_MASK(EC_HOST_EVENT_LID_OPEN) | + EC_HOST_EVENT_MASK(EC_HOST_EVENT_MODE_CHANGE); lpc_set_host_event_mask(LPC_HOST_EVENT_WAKE, mask); } @@ -118,16 +119,17 @@ static void s0ix_lpc_enable_wake_mask_for_lid_open(void) * In AP S0ix & S3 -> S0 transitions, * the chipset_resume hook is called. * - * During S0ix exit, the wake mask for lid open is disabled. + * During S0ix exit, the wake mask for lid open and tablet mode is disabled. * All pending events are cleared */ -static void s0ix_lpc_disable_wake_mask_for_lid_open(void) +static void s0ix_lpc_disable_wake_mask(void) { if (chipset_in_state(CHIPSET_STATE_STANDBY | CHIPSET_STATE_ON)) { uint32_t mask; mask = lpc_get_host_event_mask(LPC_HOST_EVENT_WAKE) & - ~EC_HOST_EVENT_MASK(EC_HOST_EVENT_LID_OPEN); + ~EC_HOST_EVENT_MASK(EC_HOST_EVENT_LID_OPEN) & + ~EC_HOST_EVENT_MASK(EC_HOST_EVENT_MODE_CHANGE); lpc_set_host_event_mask(LPC_HOST_EVENT_WAKE, mask); @@ -341,7 +343,7 @@ enum power_state common_intel_x86_power_handle_state(enum power_state state) /* call hooks before standby */ hook_notify(HOOK_CHIPSET_SUSPEND); - s0ix_lpc_enable_wake_mask_for_lid_open(); + s0ix_lpc_enable_wake_mask(); /* * Enable idle task deep sleep. Allow the low power idle task @@ -353,7 +355,7 @@ enum power_state common_intel_x86_power_handle_state(enum power_state state) case POWER_S0ixS0: - s0ix_lpc_disable_wake_mask_for_lid_open(); + s0ix_lpc_disable_wake_mask(); /* Call hooks now that rails are up */ hook_notify(HOOK_CHIPSET_RESUME); |