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authorWei-Ning Huang <wnhuang@google.com>2017-05-18 13:05:47 +0800
committerchrome-bot <chrome-bot@chromium.org>2017-05-18 06:03:50 -0700
commit726a7c83542be2632b8f138e0a9a79f093248837 (patch)
tree893bedfc9c7443973cdde4964ac64ae12cd86a49
parente5a4d4746174919c9a1bc0cd567ee19c0f9740ea (diff)
downloadchrome-ec-726a7c83542be2632b8f138e0a9a79f093248837.tar.gz
config: allow increasing i2c host packet buffer size with config
Some chip supports two owned slave address. The second slave address is used for other purpose such as board specific i2c commands. This option can be set if user of the second slave address requires larger host packet er size. BRANCH=none BUG=b:37187312 TEST=`make BOARD=rose -j` Change-Id: I8d0b04bf4dded55e3957c7b25d849663299593e5 Signed-off-by: Wei-Ning Huang <wnhuang@google.com> Reviewed-on: https://chromium-review.googlesource.com/472288 Commit-Ready: Wei-Ning Huang <wnhuang@chromium.org> Tested-by: Wei-Ning Huang <wnhuang@chromium.org> Reviewed-by: Rong Chang <rongchang@chromium.org>
-rw-r--r--chip/stm32/i2c-stm32f0.c3
-rw-r--r--chip/stm32/i2c-stm32f4.c3
-rw-r--r--include/config.h8
3 files changed, 12 insertions, 2 deletions
diff --git a/chip/stm32/i2c-stm32f0.c b/chip/stm32/i2c-stm32f0.c
index 5b58cb3e45..d1d40f242b 100644
--- a/chip/stm32/i2c-stm32f0.c
+++ b/chip/stm32/i2c-stm32f0.c
@@ -196,7 +196,8 @@ defined(CONFIG_LOW_POWER_IDLE) && \
* and result/size on response). After any protocol-specific headers, the
* buffers must be 32-bit aligned.
*/
-static uint8_t host_buffer_padded[I2C_MAX_HOST_PACKET_SIZE + 4] __aligned(4);
+static uint8_t host_buffer_padded[I2C_MAX_HOST_PACKET_SIZE + 4 +
+ CONFIG_I2C_EXTRA_PACKET_SIZE] __aligned(4);
static uint8_t * const host_buffer = host_buffer_padded + 2;
static uint8_t params_copy[I2C_MAX_HOST_PACKET_SIZE] __aligned(4);
static int host_i2c_resp_port;
diff --git a/chip/stm32/i2c-stm32f4.c b/chip/stm32/i2c-stm32f4.c
index 5d8a837cf6..a542088567 100644
--- a/chip/stm32/i2c-stm32f4.c
+++ b/chip/stm32/i2c-stm32f4.c
@@ -763,7 +763,8 @@ DECLARE_HOOK(HOOK_FREQ_CHANGE, i2c_freq_change_hook, HOOK_PRIO_DEFAULT);
* and result/size on response). After any protocol-specific headers, the
* buffers must be 32-bit aligned.
*/
-static uint8_t host_buffer_padded[I2C_MAX_HOST_PACKET_SIZE + 4] __aligned(4);
+static uint8_t host_buffer_padded[I2C_MAX_HOST_PACKET_SIZE + 4 +
+ CONFIG_I2C_EXTRA_PACKET_SIZE] __aligned(4);
static uint8_t * const host_buffer = host_buffer_padded + 2;
static uint8_t params_copy[I2C_MAX_HOST_PACKET_SIZE] __aligned(4);
static int host_i2c_resp_port;
diff --git a/include/config.h b/include/config.h
index 76a6049720..7d8d3900d1 100644
--- a/include/config.h
+++ b/include/config.h
@@ -1438,6 +1438,14 @@
#undef CONFIG_I2C_SCL_GATE_GPIO
/*
+ * Some chip supports two owned slave address. The second slave address is used
+ * for other purpose such as board specific i2c commands. This option can be
+ * set if user of the second slave address requires larger host packet buffer
+ * size.
+ */
+#define CONFIG_I2C_EXTRA_PACKET_SIZE 0
+
+/*
* I2C multi-port controller.
*
* If CONFIG_I2C_MULTI_PORT_CONTROLLER is defined, a single on-chip I2C