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authorCaveh Jalali <caveh@chromium.org>2017-06-19 20:13:26 -0700
committerchrome-bot <chrome-bot@chromium.org>2017-06-20 17:24:17 -0700
commit053cb4bb24a948f917b78e7e17ffdff8733d01a0 (patch)
treea91889be45ee5aec073122b267df7cb2677db603
parentcd6c3a0feffe3f89eef81cf864bc1e9d36d9f109 (diff)
downloadchrome-ec-053cb4bb24a948f917b78e7e17ffdff8733d01a0.tar.gz
ps8751: assert reset for at least 1ms.
the 1ms reset hold time isn't in the ps8751 datasheets (yet), but that's what our parade support contact recommended. i'm applying this fix to reef (electro) and coral as these two boards were missing any sort of reset hold time. other boards using the ps8751 seem to already have a 1ms or 10ms delay. TEST=rebuilt, reload EC image on electro... no ill effects noted. BUG=b:62642003 BRANCH=reef Change-Id: I39a989375e789118d062f82e9baaa041e5e6b033 Signed-off-by: Caveh Jalali <caveh@google.com> Reviewed-on: https://chromium-review.googlesource.com/540742 Reviewed-by: Nicolas Boichat <drinkcat@chromium.org>
-rw-r--r--board/coral/board.c10
-rw-r--r--board/reef/board.c10
2 files changed, 16 insertions, 4 deletions
diff --git a/board/coral/board.c b/board/coral/board.c
index 6291b4d7b1..396adba236 100644
--- a/board/coral/board.c
+++ b/board/coral/board.c
@@ -339,11 +339,17 @@ void board_reset_pd_mcu(void)
/* Assert reset to TCPC0 */
board_set_tcpc_power_mode(0, 0);
+ /* TCPC1 (ps8751) requires 1ms reset down assertion */
+ msleep(1);
+
/* Deassert reset to TCPC1 */
gpio_set_level(GPIO_USB_C1_PD_RST_ODL, 1);
- /* TCPC0 requires 10ms reset/power down assertion */
- msleep(10);
+ /*
+ * TCPC0 requires 10ms reset/power down assertion
+ * minus the 1ms for the TCPC1.
+ */
+ msleep(9);
/* Deassert reset to TCPC0 */
board_set_tcpc_power_mode(0, 1);
diff --git a/board/reef/board.c b/board/reef/board.c
index 77964411c6..156ef233f3 100644
--- a/board/reef/board.c
+++ b/board/reef/board.c
@@ -338,11 +338,17 @@ void board_reset_pd_mcu(void)
/* Assert reset to TCPC0 */
board_set_tcpc_power_mode(0, 0);
+ /* TCPC1 (ps8751) requires 1ms reset down assertion */
+ msleep(1);
+
/* Deassert reset to TCPC1 */
gpio_set_level(GPIO_USB_C1_PD_RST_ODL, 1);
- /* TCPC0 requires 10ms reset/power down assertion */
- msleep(10);
+ /*
+ * TCPC0 requires 10ms reset/power down assertion
+ * minus the 1ms for the TCPC1.
+ */
+ msleep(9);
/* Deassert reset to TCPC0 */
board_set_tcpc_power_mode(0, 1);