KBL/SKL: Add wait between DSW_PWROK and PWRBTN

This patch adds wait between DSW_PWROK and PWRBTN assert. It is
required to be 95 msec or longer for Kaby Lake and Sky Lake.
Refer to the timing diagram for G3 to S0 on Sky Lake or Kaby Lake
platform design guide for details.

BUG=b:62584658
BRANCH=none
TEST=On Fizz, measured time between DSW_PWROK high and PWRBTN assert
for 1:AC plug-in, 2:recovery+power press, 3: reboot ec command.

Change-Id: I89a14ac9a49e20a332bd662d90be62f8ea23b003
Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/534901

5 files changed, 39 insertions, 0 deletions

diff --git a/board/fizz/board.c b/board/fizz/board.c
index e997d77af0..33b09c1021 100644
--- a/board/fizz/board.c
+++ b/board/fizz/board.c
@@ -438,3 +438,9 @@ enum battery_present battery_is_present(void)
 	/* The GPIO is low when the battery is present */
 	return BP_NO;
 }
+
+int64_t get_time_dsw_pwrok(void)
+{
+	/* DSW_PWROK is turned on before EC was powered. */
+	return -20 * MSEC;
+}
diff --git a/board/fizz/board.h b/board/fizz/board.h
index ec2f87d9a6..dd79c0d36e 100644
--- a/board/fizz/board.h
+++ b/board/fizz/board.h
@@ -75,6 +75,7 @@
 #define CONFIG_POWER_BUTTON_INIT_IDLE
 #define CONFIG_POWER_COMMON
 #define CONFIG_POWER_SIGNAL_INTERRUPT_STORM_DETECT_THRESHOLD 30
+#define CONFIG_DELAY_DSW_PWROK_TO_PWRBTN
 
 /* Sensor */
 #define CONFIG_TEMP_SENSOR
diff --git a/common/power_button_x86.c b/common/power_button_x86.c
index bccf9c9c11..e6bdde38bc 100644
--- a/common/power_button_x86.c
+++ b/common/power_button_x86.c
@@ -321,6 +321,16 @@ static void state_machine(uint64_t tnow)
 		 * battery is handled inside set_pwrbtn_to_pch().
 		 */
 		chipset_exit_hard_off();
+#ifdef CONFIG_DELAY_DSW_PWROK_TO_PWRBTN
+		/* Check if power button is ready. If not, we'll come back. */
+		if (get_time().val - get_time_dsw_pwrok() <
+				CONFIG_DSW_PWROK_TO_PWRBTN_US) {
+			tnext_state = get_time_dsw_pwrok() +
+					CONFIG_DSW_PWROK_TO_PWRBTN_US;
+			break;
+		}
+#endif
+
 		set_pwrbtn_to_pch(0, 1);
 		tnext_state = get_time().val + PWRBTN_INITIAL_US;
 
diff --git a/include/config.h b/include/config.h
index 6c95fb34e3..5be7eca5df 100644
--- a/include/config.h
+++ b/include/config.h
@@ -1848,6 +1848,20 @@
 /* Set power button state idle at init */
 #undef CONFIG_POWER_BUTTON_INIT_IDLE
 
+/*
+ * Enable delay between DSW_PWROK and PWRBTN assertion.
+ * If enabled, DSW_PWROK_TO_PWRBTN_US and get_time_dsw_pwrok must be defined
+ * as well.
+ */
+#undef CONFIG_DELAY_DSW_PWROK_TO_PWRBTN
+
+/*
+ * The time in usec required for PMC to be ready to detect power button press.
+ * Refer to the timing diagram for G3 to S0 on PDG for details.
+ */
+#define CONFIG_DSW_PWROK_TO_PWRBTN_US (95 * MSEC)
+
+
 /* Compile common code for AP power state machine */
 #undef CONFIG_POWER_COMMON
 
diff --git a/include/power_button.h b/include/power_button.h
index 3297c411eb..cfa234c8be 100644
--- a/include/power_button.h
+++ b/include/power_button.h
@@ -54,4 +54,12 @@ void power_button_pch_release(void);
  */
 void power_button_pch_pulse(void);
 
+/**
+ * Returns the time when DSW_PWROK was asserted. It should be customized
+ * by each board. See CONFIG_DELAY_DSW_PWROK_TO_PWRBTN for details.
+ *
+ * @return time in usec when DSW_PWROK was asserted.
+ */
+int64_t get_time_dsw_pwrok(void);
+
 #endif  /* __CROS_EC_POWER_BUTTON_H */