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| author | Nicolas Boichat <drinkcat@google.com> | 2017-07-07 16:57:12 +0800 |
|---|---|---|
| committer | chrome-bot <chrome-bot@chromium.org> | 2017-07-10 11:22:35 -0700 |
| commit | 5e6f9a2b3836102c784f66b1afa85248fd2ba06e (patch) | |
| tree | 4785fde769060f28ac7283ea5413e176044cbd3a | |
| parent | b20a873d0f58809b77dd1c4d40706f0441e798e3 (diff) | |
| download | chrome-ec-5e6f9a2b3836102c784f66b1afa85248fd2ba06e.tar.gz | |
chip/stm32/i2c-stm32f0: Adjust 400kHz setting (48Mhz clock source)
STM32 I2C frequency can be computed as such:
tSCL = tSYNC1 + tSYNC2 + { [(SCLH+1) + (SCLL+1)] x
(PRESC+1) x tI2CCLK }
The default values we use come from the datasheet, which assume,
for 400 kHz setting, that tSYNC1 + tSYNC2 = 750 ns, and therefore
set tSCLH as 500 ns and tSCLL as 1250ns.
On hammer, we measured a total tSCL of ~2150 ns (465 kHz) with
these settings, so we can easily slow it down to ~2500 ns (400 kHz)
by increasing tSCLH to 750 ns (SCLH = 0x5).
As highlighted in 48b2edf031b
"stm32f0/i2c: adjust the 100kHz setting to never go above 100kHz"
this has the disadvantage of slowing down other boards where
the RC value on the I2C bus are different, but slowing down should
always be safe, and is the best we can do without adding config
defines for the fall/rise time.
BRANCH=none
BUG=b:36172041
TEST=Flash hammer, measure SCL frequency to be about 400 kHz
Change-Id: Ia2cac9fb09228abd8a318d57335855be529485c2
Signed-off-by: Nicolas Boichat <drinkcat@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/563219
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
| -rw-r--r-- | chip/stm32/i2c-stm32f0.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/chip/stm32/i2c-stm32f0.c b/chip/stm32/i2c-stm32f0.c index d1d40f242b..d8dbd759fc 100644 --- a/chip/stm32/i2c-stm32f0.c +++ b/chip/stm32/i2c-stm32f0.c @@ -102,7 +102,7 @@ enum stm32_i2c_clk_src { static const uint32_t timingr_regs[I2C_CLK_SRC_COUNT][I2C_FREQ_COUNT] = { [I2C_CLK_SRC_48MHZ] = { [I2C_FREQ_1000KHZ] = 0x50100103, - [I2C_FREQ_400KHZ] = 0x50330309, + [I2C_FREQ_400KHZ] = 0x50330509, [I2C_FREQ_100KHZ] = 0xB0421214, }, [I2C_CLK_SRC_8MHZ] = { |